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            <div class="title">MCUCTRL - MCU Miscellaneous Control Logic</div>
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                <h3 class="panel-title"> MCUCTRL Register Index</h3>
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                <table>
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000000:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CHIPPN" target="_self">CHIPPN - Chip Information</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000004:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CHIPID0" target="_self">CHIPID0 - Unique Chip ID 0</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000008:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CHIPID1" target="_self">CHIPID1 - Unique Chip ID 1</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000000C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#CHIPREV" target="_self">CHIPREV - Chip Revision</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000010:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#VENDORID" target="_self">VENDORID - Unique Vendor ID</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000014:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SKU" target="_self">SKU - Unique Chip SKU</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000020:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DEBUGGER" target="_self">DEBUGGER - Debugger Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000028:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#ACRG" target="_self">ACRG - Active Current Reference Generator Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000044:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#VREFGEN2" target="_self">VREFGEN2 - Voltage Reference Generator 2 Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000060:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#VRCTRL" target="_self">VRCTRL - Overrides for Voltage Regulators Controls</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000080:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#LDOREG1" target="_self">LDOREG1 - CORELDO trims Reg</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000088:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#LDOREG2" target="_self">LDOREG2 - MEMLDO and MEMLPLDO Trims</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000C4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#HFRC2" target="_self">HFRC2 - HFRC2 Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000000E0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#LFRC" target="_self">LFRC - LFRC Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000100:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#BODCTRL" target="_self">BODCTRL - BOD control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000104:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#ADCPWRDLY" target="_self">ADCPWRDLY - ADC Power Up Delay Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000108:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#ADCPWRCTRL" target="_self">ADCPWRCTRL - ADC Power Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000010C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#ADCCAL" target="_self">ADCCAL - ADC Calibration Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000110:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#ADCBATTLOAD" target="_self">ADCBATTLOAD - ADC Battery Load Enable</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000120:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#XTALCTRL" target="_self">XTALCTRL - XTAL Oscillator Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000124:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#XTALGENCTRL" target="_self">XTALGENCTRL - XTAL Oscillator General Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000128:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#XTALHSTRIMS" target="_self">XTALHSTRIMS - XTALHS Trims</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000012C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#XTALHSCTRL" target="_self">XTALHSCTRL - XTALHS Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000180:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#MRAMPWRCTRL" target="_self">MRAMPWRCTRL - MRAM Power Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001AC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#BODISABLE" target="_self">BODISABLE - Brownout Disable</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001B0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#D2ASPARE" target="_self">D2ASPARE - Spare registers to analog module</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001B8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#BOOTLOADER" target="_self">BOOTLOADER - Bootloader and secure boot functions</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001BC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SHADOWVALID" target="_self">SHADOWVALID - Register to indicate whether the shadow registers have been successfully loaded from the Flash Information Space.</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001C0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCRATCH0" target="_self">SCRATCH0 - Scratch register that is not reset by any reset</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000001C4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SCRATCH1" target="_self">SCRATCH1 - Scratch register that is not reset by any reset</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000200:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DBGR1" target="_self">DBGR1 - Read-only debug 1</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000204:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DBGR2" target="_self">DBGR2 - Read-only debug 2</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000220:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PMUENABLE" target="_self">PMUENABLE - Control bit to enable/disable the PMU</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000250:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DBGCTRL" target="_self">DBGCTRL - Debug subsystem Control. Determines the debug components enable and clk frequency.</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000264:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#OTAPOINTER" target="_self">OTAPOINTER - OTA (Over the Air) Update Pointer/Status. Reset only by POA</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000280:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#APBDMACTRL" target="_self">APBDMACTRL - DMA Control Register. Determines misc settings for DMA operation</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000338:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#KEXTCLKSEL" target="_self">KEXTCLKSEL - Key Register to enable the use of external clock selects via the EXTCLKSEL reg</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000033C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK0" target="_self">SIMOBUCK0 - SIMOBUCK specific control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000340:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK1" target="_self">SIMOBUCK1 - SIMO Buck Clock, buck sequence, observation bus Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000344:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK2" target="_self">SIMOBUCK2 - SIMO Buck Muxed VDDC Active Sequence Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000348:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK3" target="_self">SIMOBUCK3 - SIMO Buck Muxed VDDC low power Sequence Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000354:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK6" target="_self">SIMOBUCK6 - SIMO Buck Muxed VDDF Active Sequence Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000358:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK7" target="_self">SIMOBUCK7 - SIMO Buck Muxed VDDF active Sequence Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000035C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK8" target="_self">SIMOBUCK8 - SIMO Buck Muxed VDDF Low Power Sequence Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000360:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK9" target="_self">SIMOBUCK9 - SIMO Buck Muxed VDDS Active Sequence Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000036C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK12" target="_self">SIMOBUCK12 - SIMO Buck Compare, Brown out, Active, Low power Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000370:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK13" target="_self">SIMOBUCK13 - SIMO Buck Compare, Brown out, Active, Low power Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000378:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SIMOBUCK15" target="_self">SIMOBUCK15 - SIMO Buck Compare, Brown out, Active and Low power Trim Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000037C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PWRSW0" target="_self">PWRSW0 - PWRSW Control 0</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000380:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PWRSW1" target="_self">PWRSW1 - PWRSW Control 1</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000388:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#USBRSTCTRL" target="_self">USBRSTCTRL - USB Reset Startup Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003A8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHWPROT0" target="_self">FLASHWPROT0 - Flash Write Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003AC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHWPROT1" target="_self">FLASHWPROT1 - Flash Write Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003B0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHWPROT2" target="_self">FLASHWPROT2 - Flash Write Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003B4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHWPROT3" target="_self">FLASHWPROT3 - Flash Write Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003B8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHRPROT0" target="_self">FLASHRPROT0 - Flash Read Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003BC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHRPROT1" target="_self">FLASHRPROT1 - Flash Read Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003C0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHRPROT2" target="_self">FLASHRPROT2 - Flash Read Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003C4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#FLASHRPROT3" target="_self">FLASHRPROT3 - Flash Read Protection Bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003C8:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DMASRAMWPROT0" target="_self">DMASRAMWPROT0 - SRAM write-protection bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003CC:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DMASRAMWPROT1" target="_self">DMASRAMWPROT1 - SRAM write-protection bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003D0:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DMASRAMRPROT0" target="_self">DMASRAMRPROT0 - SRAM read-protection bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x000003D4:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#DMASRAMRPROT1" target="_self">DMASRAMRPROT1 - SRAM read-protection bits</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000418:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#USBPHYRESET" target="_self">USBPHYRESET - DSP0 CACHE RAM TRIM</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000042C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUDADCPWRCTRL" target="_self">AUDADCPWRCTRL - Audio ADC Power Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000430:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUDIO1" target="_self">AUDIO1 - Audio trims 1</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000438:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PGAADCIFCTRL" target="_self">PGAADCIFCTRL - PGA ADCIF control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x0000043C:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PGACTRL1" target="_self">PGACTRL1 - PGA control 1</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000440:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PGACTRL2" target="_self">PGACTRL2 - PGA control 2</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000444:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#AUDADCPWRDLY" target="_self">AUDADCPWRDLY - Audio ADC Power Up Delay Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000450:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#SDIOCTRL" target="_self">SDIOCTRL - SDIO/eMMC Control</a>
                        </td>
                    </tr>

                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x00000454:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <a class="el" href="#PDMCTRL" target="_self">PDMCTRL - PDM Control</a>
                        </td>
                    </tr>

                </table>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CHIPPN" class="panel-title">CHIPPN - Chip Information</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020000</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Chip Information</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="8">PN
                                <br>0x8</td>

                            <td align="center" colspan="4">MRAMSIZE
                                <br>0x3</td>

                            <td align="center" colspan="4">SRAMSIZE
                                <br>0x2</td>

                            <td align="center" colspan="4">REVMAJ
                                <br>0x0</td>

                            <td align="center" colspan="4">REVMIN
                                <br>0x0</td>

                            <td align="center" colspan="2">PKG
                                <br>0x2</td>

                            <td align="center" colspan="3">PINS
                                <br>0x1</td>

                            <td align="center" colspan="2">TEMP
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:24</td>
                            <td>PN</td>
                            <td>RO</td>
                            <td>Apollo family device type.<br><br>
                                 APOLLO4L             = 0x9 - Apollo4L part number is 0x09xxxxxx.<br>
                             APOLLO4              = 0x8 - Apollo4 part number is 0x08xxxxxx.<br>
                             APOLLO3P             = 0x7 - Apollo3P part number is 0x07xxxxxx.<br>
                             APOLLO3              = 0x6 - Apollo3 part number is 0x06xxxxxx.<br>
                             APOLLO2              = 0x3 - Apollo2 part number is 0x03xxxxxx.<br>
                             APOLLO               = 0x1 - Apollo part number is 0x01xxxxxx.</td>
                        </tr>

                        <tr>
                            <td>23:20</td>
                            <td>MRAMSIZE</td>
                            <td>RO</td>
                            <td>MRAM size.<br><br>
                                 0P5MB                = 0x0 - MRAM size is 0.5MB<br>
                             1P0MB                = 0x1 - MRAM size is 1.0MB<br>
                             1P5MB                = 0x2 - MRAM size is 1.5MB<br>
                             2P0MB                = 0x3 - MRAM size is 2.0MB</td>
                        </tr>

                        <tr>
                            <td>19:16</td>
                            <td>SRAMSIZE</td>
                            <td>RO</td>
                            <td>SRAM size.<br><br>
                                 384_512              = 0x0 - SRAM size is 384KB+512KB<br>
                             384_1024             = 0x1 - SRAM size is 384KB+1MB<br>
                             384_1024_384_96      = 0x2 - SRAM size is 384KB+1MB+384KB+96KB</td>
                        </tr>

                        <tr>
                            <td>15:12</td>
                            <td>REVMAJ</td>
                            <td>RO</td>
                            <td>Major revision.<br><br>
                                 A                    = 0x0 - Major Rev A<br>
                             B                    = 0x1 - Major Rev B<br>
                             C                    = 0x2 - Major Rev C</td>
                        </tr>

                        <tr>
                            <td>11:8</td>
                            <td>REVMIN</td>
                            <td>RO</td>
                            <td>Minor revision.<br><br>
                                 0                    = 0x0 - Minor Rev 0<br>
                             1                    = 0x1 - Minor Rev 1</td>
                        </tr>

                        <tr>
                            <td>7:6</td>
                            <td>PKG</td>
                            <td>RO</td>
                            <td>Package type.<br><br>
                                 SIP                  = 0x0 - SIP package.<br>
                             SIP2                 = 0x1 - SIP2 package.<br>
                             BGA                  = 0x2 - BGA package.<br>
                             CSP                  = 0x3 - CSP package.</td>
                        </tr>

                        <tr>
                            <td>5:3</td>
                            <td>PINS</td>
                            <td>RO</td>
                            <td>Number of pins for this package.<br><br>
                                 25                   = 0x0 - 25 pins<br>
                             49                   = 0x1 - 49 pins<br>
                             64                   = 0x2 - 64 pins<br>
                             81                   = 0x3 - 81 pins</td>
                        </tr>

                        <tr>
                            <td>2:1</td>
                            <td>TEMP</td>
                            <td>RO</td>
                            <td>Temperature.<br><br>
                                 COM                  = 0x0 - Commercial temperature<br>
                             MIL                  = 0x1 - Military temperature<br>
                             AUTO                 = 0x2 - Automotive temperature<br>
                             IND                  = 0x3 - Industrial temperature</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CHIPID0" class="panel-title">CHIPID0 - Unique Chip ID 0</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020004</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Unique Chip ID 0</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">CHIPID0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>CHIPID0</td>
                            <td>RO</td>
                            <td>Unique chip ID 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CHIPID1" class="panel-title">CHIPID1 - Unique Chip ID 1</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020008</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Unique Chip ID 1</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">CHIPID1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>CHIPID1</td>
                            <td>RO</td>
                            <td>Unique chip ID 1.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="CHIPREV" class="panel-title">CHIPREV - Chip Revision</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002000C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Chip Revision</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="12">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="12">SIPART
                                <br>0x0</td>

                            <td align="center" colspan="4">REVMAJ
                                <br>0x1</td>

                            <td align="center" colspan="4">REVMIN
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:20</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:8</td>
                            <td>SIPART</td>
                            <td>RO</td>
                            <td>Silicon Part ID<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:4</td>
                            <td>REVMAJ</td>
                            <td>RO</td>
                            <td>Major Revision ID.<br><br>
                                 C                    = 0x3 - Apollo4 revision C<br>
                             B                    = 0x2 - Apollo4 revision B<br>
                             A                    = 0x1 - Apollo4 revision A</td>
                        </tr>

                        <tr>
                            <td>3:0</td>
                            <td>REVMIN</td>
                            <td>RO</td>
                            <td>Minor Revision ID.<br><br>
                                 REV2                 = 0x3 - Apollo4 minor rev 2.<br>
                             REV1                 = 0x2 - Apollo4 minor rev 1.<br>
                             REV0                 = 0x1 - Apollo4 minor rev 0. Minor revision value, succeeding minor revisions will increment from this value.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="VENDORID" class="panel-title">VENDORID - Unique Vendor ID</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020010</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Unique Vendor ID</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">VENDORID
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>VENDORID</td>
                            <td>RO</td>
                            <td>Unique Vendor ID<br><br>
                                 AMBIQ                = 0x414D4251 - Ambiq Vendor ID 'AMBQ'<br>
                             DEFAULT              = 0x0 - Default Vendor ID</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SKU" class="panel-title">SKU - Unique Chip SKU</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020014</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Unique Chip SKU</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="21">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">SKUSECURESPOT
                                <br>0x0</td>

                            <td align="center" colspan="1">SKUUSB
                                <br>0x0</td>

                            <td align="center" colspan="1">SKUGFX
                                <br>0x0</td>

                            <td align="center" colspan="1">SKUMIPIDSI
                                <br>0x0</td>

                            <td align="center" colspan="1">SKUTURBOSPOT
                                <br>0x0</td>

                            <td align="center" colspan="2">SKUDSP
                                <br>0x3</td>

                            <td align="center" colspan="2">SKUMRAMSIZE
                                <br>0x3</td>

                            <td align="center" colspan="2">SKUSRAMSIZE
                                <br>0x3</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>SKUSECURESPOT</td>
                            <td>RO</td>
                            <td>Secure boot feature<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>SKUUSB</td>
                            <td>RO</td>
                            <td>USB available<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>SKUGFX</td>
                            <td>RO</td>
                            <td>GFX available<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>SKUMIPIDSI</td>
                            <td>RO</td>
                            <td>MIPI DSI available<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>SKUTURBOSPOT</td>
                            <td>RO</td>
                            <td>High performance mode for MCU and DSPs.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:4</td>
                            <td>SKUDSP</td>
                            <td>RO</td>
                            <td>DSP availability SKU setting. 384K available by default. Memory SU disabled<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3:2</td>
                            <td>SKUMRAMSIZE</td>
                            <td>RO</td>
                            <td>MRAM size SKU. All of 2MB Available by default. Memory SU disabled<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>SKUSRAMSIZE</td>
                            <td>RO</td>
                            <td>SRAM SKU dictates the available memory for MCU. All of the MCU TCM (384KB) and System SRAM (2MB) available by default. Memory SU disabled<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DEBUGGER" class="panel-title">DEBUGGER - Debugger Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020020</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Debugger Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">LOCKOUT
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>LOCKOUT</td>
                            <td>RW</td>
                            <td>Lockout of debugger (SWD).<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="ACRG" class="panel-title">ACRG - Active Current Reference Generator Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020028</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Active Current Reference Generator Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="24">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="5">ACRGTRIM
                                <br>0x10</td>

                            <td align="center" colspan="1">ACRGIBIASSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">ACRGPWD
                                <br>0x0</td>

                            <td align="center" colspan="1">ACRGSWE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:8</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:3</td>
                            <td>ACRGTRIM</td>
                            <td>RW</td>
                            <td>ACRG Trim value<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>ACRGIBIASSEL</td>
                            <td>RW</td>
                            <td>Set the ACRG ibias. Note: the SWE mux select in PWRSEQ2SWE must be set for this to take effect. The inversion of this register is driven to analog.<br><br>
                                 BGSEL                = 0x0 - Selects the bandgap<br>
                             CCRGSEL              = 0x1 - Selects the CCRG</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>ACRGPWD</td>
                            <td>RW</td>
                            <td>Power down the ACRG.<br><br>
                                 ACRG_PWR_DN          = 0x1 - Powers down the ACRG trim.<br>
                             ACRG_PWR_UP          = 0x0 - Power up the ACRG trim.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>ACRGSWE</td>
                            <td>RW</td>
                            <td>Software enablement for ACRG register. A value of 1 will allow writes to the register<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="VREFGEN2" class="panel-title">VREFGEN2 - Voltage Reference Generator 2 Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020044</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Voltage Reference Generator 2 Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TVRG2SELVREF
                                <br>0x0</td>

                            <td align="center" colspan="1">TVRGSELVREF
                                <br>0x0</td>

                            <td align="center" colspan="7">TVRG2VREFTRIM
                                <br>0x3e</td>

                            <td align="center" colspan="1">TVRG2CURRENTTRIM
                                <br>0x0</td>

                            <td align="center" colspan="1">TVRG2PWD
                                <br>0x0</td>

                            <td align="center" colspan="5">TVRG2TEMPCOTRIM
                                <br>0x10</td>

                            <td align="center" colspan="7">TVRGVREFTRIM
                                <br>0x3e</td>

                            <td align="center" colspan="1">TVRGCURRENTTRIM
                                <br>0x0</td>

                            <td align="center" colspan="1">TVRGPWD
                                <br>0x0</td>

                            <td align="center" colspan="5">TVRGTEMPCOTRIM
                                <br>0x10</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:30</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>TVRG2SELVREF</td>
                            <td>RO</td>
                            <td>TVRG2 SEL VREF<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>TVRGSELVREF</td>
                            <td>RO</td>
                            <td>TVRG SEL VREF<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27:21</td>
                            <td>TVRG2VREFTRIM</td>
                            <td>RW</td>
                            <td>Calibrated voltage reference 580m trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>TVRG2CURRENTTRIM</td>
                            <td>RW</td>
                            <td>Calibrated voltage reference current trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>TVRG2PWD</td>
                            <td>RW</td>
                            <td>Power Down, Calibrated Voltage Reference Generator.<br><br>
                                 PWR_DN               = 0x1 - Powers down the CVRG.<br>
                             PWR_UP               = 0x0 - Power up the CVRG.</td>
                        </tr>

                        <tr>
                            <td>18:14</td>
                            <td>TVRG2TEMPCOTRIM</td>
                            <td>RW</td>
                            <td>Calibrated Voltage Reference Generator tc trim (bottom transistor)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13:7</td>
                            <td>TVRGVREFTRIM</td>
                            <td>RW</td>
                            <td>Calibrated voltage reference 580m trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>TVRGCURRENTTRIM</td>
                            <td>RW</td>
                            <td>Calibrated voltage reference current trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>TVRGPWD</td>
                            <td>RW</td>
                            <td>Power Down, Calibrated Voltage Reference Generator.<br><br>
                                 PWR_DN               = 0x1 - Powers down the CVRG.<br>
                             PWR_UP               = 0x0 - Power up the CVRG.</td>
                        </tr>

                        <tr>
                            <td>4:0</td>
                            <td>TVRGTEMPCOTRIM</td>
                            <td>RW</td>
                            <td>Calibrated Voltage Reference Generator tc trim (bottom transistor)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="VRCTRL" class="panel-title">VRCTRL - Overrides for Voltage Regulators Controls</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020060</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Overrides for Voltage Regulators Controls</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="12">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">SIMOBUCKACTIVE
                                <br>0x0</td>

                            <td align="center" colspan="1">SIMOBUCKRSTB
                                <br>0x0</td>

                            <td align="center" colspan="1">SIMOBUCKPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">SIMOBUCKOVER
                                <br>0x0</td>

                            <td align="center" colspan="1">ANALDOACTIVE
                                <br>0x0</td>

                            <td align="center" colspan="1">ANALDOPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">ANALDOOVER
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLPLDOACTIVE
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLPLDOPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLPLDOOVER
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLDOCOLDSTARTEN
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLDOACTIVE
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLDOACTIVEEARLY
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLDOPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLDOOVER
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOCOLDSTARTEN
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOACTIVE
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOACTIVEEARLY
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOOVER
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:20</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>SIMOBUCKACTIVE</td>
                            <td>RW</td>
                            <td>SIMO BUCK ACTIVE control. Override for PWRCTRL going to analog when SIMOBUCKOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>SIMOBUCKRSTB</td>
                            <td>RW</td>
                            <td>SIMO BUCK RSTB control. Override for PWRCTRL going to analog when SIMOBUCKOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>SIMOBUCKPDNB</td>
                            <td>RW</td>
                            <td>SIMO BUCK PDNB control. Override for PWRCTRL going to analog when SIMOBUCKOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>SIMOBUCKOVER</td>
                            <td>RW</td>
                            <td>Override control for SIMO BUCK signals<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>ANALDOACTIVE</td>
                            <td>RW</td>
                            <td>ANALDO LDO ACTIVE control. Override for PWRCTRL going to analog when ANALDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>ANALDOPDNB</td>
                            <td>RW</td>
                            <td>ANALDO PDNB control. Override for PWRCTRL going to analog when ANALDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>ANALDOOVER</td>
                            <td>RW</td>
                            <td>Override control for ANALDO signals<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>MEMLPLDOACTIVE</td>
                            <td>RW</td>
                            <td>MEM LP LDO ACTVIVE control. Override for PWRCTRL going to analog when MEMLPLDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>MEMLPLDOPDNB</td>
                            <td>RW</td>
                            <td>MEM LP LDO PDNB control. Override for PWRCTRL going to analog when MEMLPLDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>MEMLPLDOOVER</td>
                            <td>RW</td>
                            <td>Override control for MEM LP LDO signals<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>MEMLDOCOLDSTARTEN</td>
                            <td>RW</td>
                            <td>MEM LDO COLDSTART EN control. This is a shadow backed register and no need to set MEMLDOOVER.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>MEMLDOACTIVE</td>
                            <td>RW</td>
                            <td>MEM LDO ACTIVE control. Override for PWRCTRL going to analog when MEMLDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>MEMLDOACTIVEEARLY</td>
                            <td>RW</td>
                            <td>MEM LDO EARLY ACTIVE control. Override for PWRCTRL going to analog when MEMLDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>MEMLDOPDNB</td>
                            <td>RW</td>
                            <td>MEM LDO PDNB control. Override signal for PWRCTRL going to analog when MEMLDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>MEMLDOOVER</td>
                            <td>RW</td>
                            <td>Override control for MEM LDO signals<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>CORELDOCOLDSTARTEN</td>
                            <td>RW</td>
                            <td>CORE LDO COLDSTART EN control. This is a shadow backed register and no need to set CORELDOOVER.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>CORELDOACTIVE</td>
                            <td>RW</td>
                            <td>CORE LDO ACTIVE control. Override for PWRCTRL going to analog when CORELDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>CORELDOACTIVEEARLY</td>
                            <td>RW</td>
                            <td>CORE LDO EARLY ACTIVE control. Override for PWRCTRL going to analog when CORELDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>CORELDOPDNB</td>
                            <td>RW</td>
                            <td>CORE LDO PDNB control. Override for PWRCTRL going to analog when CORELDOOVER = 1<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CORELDOOVER</td>
                            <td>RW</td>
                            <td>Override control for CORE LDO signals<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="LDOREG1" class="panel-title">LDOREG1 - CORELDO trims Reg</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020080</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>CORELDO trims Reg</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="10">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOIBIASSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">CORELDOIBIASTRIM
                                <br>0x0</td>

                            <td align="center" colspan="6">CORELDOLPTRIM
                                <br>0x1b</td>

                            <td align="center" colspan="4">CORELDOTEMPCOTRIM
                                <br>0x4</td>

                            <td align="center" colspan="10">CORELDOACTIVETRIM
                                <br>0x3a3</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>Reserved<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>CORELDOIBIASSEL</td>
                            <td>RW</td>
                            <td>Core LDO IBIAS sel. Note: the SWE mux select in PWRSEQ2SWE must be set for this to take effect.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>CORELDOIBIASTRIM</td>
                            <td>RW</td>
                            <td>CORE LDO IBIAS Trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:14</td>
                            <td>CORELDOLPTRIM</td>
                            <td>RW</td>
                            <td>CORE LDO Low Power Trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13:10</td>
                            <td>CORELDOTEMPCOTRIM</td>
                            <td>RW</td>
                            <td>CORE LDO TEMPCO trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9:0</td>
                            <td>CORELDOACTIVETRIM</td>
                            <td>RW</td>
                            <td>CORE LDO active trim<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="LDOREG2" class="panel-title">LDOREG2 - MEMLDO and MEMLPLDO Trims</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020088</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>MEMLDO and MEMLPLDO Trims</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="4">TRIMANALDO
                                <br>0x8</td>

                            <td align="center" colspan="1">MEMLDOIBIASSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">MEMLPLDOIBIASTRIM
                                <br>0x0</td>

                            <td align="center" colspan="6">MEMLPLDOTRIM
                                <br>0x1f</td>

                            <td align="center" colspan="6">MEMLDOLPALTTRIM
                                <br>0x3c</td>

                            <td align="center" colspan="6">MEMLDOLPTRIM
                                <br>0x3c</td>

                            <td align="center" colspan="6">MEMLDOACTIVETRIM
                                <br>0x3a</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:30</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29:26</td>
                            <td>TRIMANALDO</td>
                            <td>RW</td>
                            <td>Analog LDO Trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>MEMLDOIBIASSEL</td>
                            <td>RW</td>
                            <td>Mem LDO IBIAS sel. Note: the SWE mux select in PWRSEQ2SWE must be set for this to take effect.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>MEMLPLDOIBIASTRIM</td>
                            <td>RW</td>
                            <td>Mem LPLDO IBIAS trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23:18</td>
                            <td>MEMLPLDOTRIM</td>
                            <td>RW</td>
                            <td>MEM LPLDO TRIM<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17:12</td>
                            <td>MEMLDOLPALTTRIM</td>
                            <td>RW</td>
                            <td>MEM LDO TRIM LP ALT SET<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:6</td>
                            <td>MEMLDOLPTRIM</td>
                            <td>RW</td>
                            <td>MEM LDO LP trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:0</td>
                            <td>MEMLDOACTIVETRIM</td>
                            <td>RW</td>
                            <td>MEM LDO active trim<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="HFRC2" class="panel-title">HFRC2 - HFRC2 Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400200C4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>HFRC2 Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="10">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="11">HF2TUNE
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD06
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD05
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD04
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD03
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD01
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:11</td>
                            <td>HF2TUNE</td>
                            <td>RW</td>
                            <td>Default HFRC2 frequency tune value<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10:6</td>
                            <td>RSVD06</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>RSVD05</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RSVD04</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>RSVD03</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2:1</td>
                            <td>RSVD01</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="LFRC" class="panel-title">LFRC - LFRC Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400200E0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>LFRC Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="19">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">LFRCSIMOCLKDIV
                                <br>0x0</td>

                            <td align="center" colspan="2">LFRCITAILTRIM
                                <br>0x1</td>

                            <td align="center" colspan="1">RESETLFRC
                                <br>0x0</td>

                            <td align="center" colspan="1">PWDLFRC
                                <br>0x0</td>

                            <td align="center" colspan="5">TRIMTUNELFRC
                                <br>0x10</td>

                            <td align="center" colspan="1">LFRCSWE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12:10</td>
                            <td>LFRCSIMOCLKDIV</td>
                            <td>RW</td>
                            <td>SIMOBUCK LP mode clock divider<br><br>
                                 DIV1                 = 0x0 - Divide by 1<br>
                             DIV2                 = 0x1 - Divide by 2<br>
                             DIV4                 = 0x2 - Divide by 4<br>
                             DIV8                 = 0x3 - Divide by 8<br>
                             DIV16                = 0x4 - Divide by 16<br>
                             DIV32                = 0x5 - Divide by 32</td>
                        </tr>

                        <tr>
                            <td>9:8</td>
                            <td>LFRCITAILTRIM</td>
                            <td>RW</td>
                            <td>LFRC ITAIL trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>RESETLFRC</td>
                            <td>RW</td>
                            <td>LFRC Reset.<br><br>
                                 EN                   = 0x0 - Enable LFRC.<br>
                             RESET                = 0x1 - Reset LFRC.</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>PWDLFRC</td>
                            <td>RW</td>
                            <td>Power Down LFRC.<br><br>
                                 PWRUP                = 0x0 - Power up LFRC.<br>
                             PWRDN                = 0x1 - Power down LFRC.</td>
                        </tr>

                        <tr>
                            <td>5:1</td>
                            <td>TRIMTUNELFRC</td>
                            <td>RW</td>
                            <td>LFRC Frequency Tune trim bits<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>LFRCSWE</td>
                            <td>RW</td>
                            <td>LFRC Software Override Enable.<br><br>
                                 OVERRIDE_DIS         = 0x0 - LFRC Software Override Disable.<br>
                             OVERRIDE_EN          = 0x1 - LFRC Software Override Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="BODCTRL" class="panel-title">BODCTRL - BOD control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020100</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>BOD control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="24">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODHVREFSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">BODLVREFSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">BODCLVPWD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODSPWD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODFPWD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODCPWD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODHPWD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODLPWD
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:8</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>BODHVREFSEL</td>
                            <td>RW</td>
                            <td>BODH External Reference Select. Note: the SWE mux select in PWRSEQ2SWE must be set for this to take effect.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>BODLVREFSEL</td>
                            <td>RW</td>
                            <td>BODL External Reference Select. Note: the SWE mux select in PWRSEQ2SWE must be set for this to take effect.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>BODCLVPWD</td>
                            <td>RW</td>
                            <td>BODC_LV Power Down.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>BODSPWD</td>
                            <td>RW</td>
                            <td>BODS Power Down.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>BODFPWD</td>
                            <td>RW</td>
                            <td>BODF Power Down.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>BODCPWD</td>
                            <td>RW</td>
                            <td>BODC Power Down.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>BODHPWD</td>
                            <td>RW</td>
                            <td>BODH Power Down.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>BODLPWD</td>
                            <td>RW</td>
                            <td>BODL Power Down.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="ADCPWRDLY" class="panel-title">ADCPWRDLY - ADC Power Up Delay Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020104</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>ADC Power Up Delay Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="8">ADCPWR1
                                <br>0x18</td>

                            <td align="center" colspan="8">ADCPWR0
                                <br>0xa9</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:8</td>
                            <td>ADCPWR1</td>
                            <td>RW</td>
                            <td>Delay time for ADC Reference Buffer settling time in 64x ADC clock increments. Delay = 64*ADCPWR1*ADC_CLK<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:0</td>
                            <td>ADCPWR0</td>
                            <td>RW</td>
                            <td>Additional delay time for ADC Reference Buffer settling time in 64x ADC clock increments. Delay = 64*ADCPWR0*ADC_CLK.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="ADCPWRCTRL" class="panel-title">ADCPWRCTRL - ADC Power Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020108</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>ADC Power Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="15">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCKEEPOUTEN
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCRFBUFSLWEN
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCINBUFEN
                                <br>0x0</td>

                            <td align="center" colspan="2">ADCINBUFSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCVBATDIVEN
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDADCRESETN
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDADCDIGISOLATE
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDADCSARISOLATE
                                <br>0x0</td>

                            <td align="center" colspan="1">REFKEEPPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">REFBUFPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">BGTLPPEN
                                <br>0x1</td>

                            <td align="center" colspan="1">BGTPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCBPSEN
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCAPSEN
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCPWRCTRLSWE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:17</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>ADCKEEPOUTEN</td>
                            <td>RW</td>
                            <td>ADC reference keeper out en<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>ADCRFBUFSLWEN</td>
                            <td>RW</td>
                            <td>ADC reference buffer slew enable<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>ADCINBUFEN</td>
                            <td>RW</td>
                            <td>ADC Input Buffer Power Enable ( if the ADCPWRCTRLSWE bit is set )<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13:12</td>
                            <td>ADCINBUFSEL</td>
                            <td>RW</td>
                            <td>ADC input buffer mux select<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>ADCVBATDIVEN</td>
                            <td>RW</td>
                            <td>ADC VBAT DIV Power Enable ( if the ADCPWRCTRLSWE bit is set )<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>VDDADCRESETN</td>
                            <td>RW</td>
                            <td>RESETN signal for Power Switched SAR and Digital Controller (when global power switch is off and if the ADCPWRCTRLSWE bit is set)<br><br>
                                 ASSERT               = 0x0 - Resetn is asserted<br>
                             DEASSERT             = 0x1 - Resetn is de-asserted</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>VDDADCDIGISOLATE</td>
                            <td>RW</td>
                            <td>ISOLATE signal for ADC Digital Contoller ( when ADCAPSEN is switched off and if the ADCPWRCTRLSWE bit is set)<br><br>
                                 DIS                  = 0x0 - No Isolation<br>
                             EN                   = 0x1 - Isolate</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>VDDADCSARISOLATE</td>
                            <td>RW</td>
                            <td>ISOLATE signal for Power Switched SAR ( when ADCBPSEN is switched off )<br><br>
                                 DIS                  = 0x0 - No Isolation<br>
                             EN                   = 0x1 - Isolate</td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>REFKEEPPEN</td>
                            <td>RW</td>
                            <td>Reference Buffer Keeper Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Reference Buffer Keeper Power Switch disable.<br>
                             EN                   = 0x1 - Reference Buffer Keeper Power Switch enable.</td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>REFBUFPEN</td>
                            <td>RW</td>
                            <td>Reference Buffer Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Reference Buffer Power Switch disable.<br>
                             EN                   = 0x1 - Reference Buffer Power Switch enable.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>BGTLPPEN</td>
                            <td>RW</td>
                            <td>Bandgap and Temperature Sensor Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Bandgap and temperature sensor disable.<br>
                             EN                   = 0x1 - Bandgap and temperature sensor enable.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>BGTPEN</td>
                            <td>RW</td>
                            <td>Bandgap and Temperature Sensor Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Bandgap and temperature sensor disable.<br>
                             EN                   = 0x1 - Bandgap and temperature sensor enable.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>ADCBPSEN</td>
                            <td>RW</td>
                            <td>Enable the Analog, IO and SAR Digital logic Power Switch on when set to 1 if the ADCPWRCTRLSWE bit is set.<br><br>
                                 DIS                  = 0x0 - ADC power switch software power disable.<br>
                             EN                   = 0x1 - ADC power switch software power enable.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>ADCAPSEN</td>
                            <td>RW</td>
                            <td>Enable the Global ADC Power Switch on when set to 1 if the ADCPWRCTRLSWE bit is set.<br><br>
                                 DIS                  = 0x0 - ADC power switch software power disable.<br>
                             EN                   = 0x1 - ADC power switch software power enable.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>ADCPWRCTRLSWE</td>
                            <td>RW</td>
                            <td>ADC Power Control Software Override Enable<br><br>
                                 OVERRIDE_DIS         = 0x0 - ADC temperature sensor and bandgap Software Override Disable.<br>
                             OVERRIDE_EN          = 0x1 - ADC temperature sensor and bandgap Software Override Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="ADCCAL" class="panel-title">ADCCAL - ADC Calibration Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002010C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>ADC Calibration Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="30">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ADCCALIBRATED
                                <br>0x0</td>

                            <td align="center" colspan="1">CALONPWRUP
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:2</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>ADCCALIBRATED</td>
                            <td>RO</td>
                            <td>Status for ADC Calibration<br><br>
                                 FALSE                = 0x0 - ADC is not calibrated<br>
                             TRUE                 = 0x1 - ADC is calibrated</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CALONPWRUP</td>
                            <td>RW</td>
                            <td>Run ADC Calibration on initial power up sequence<br><br>
                                 DIS                  = 0x0 - Disable automatic calibration on initial power up<br>
                             EN                   = 0x1 - Enable automatic calibration on initial power up</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="ADCBATTLOAD" class="panel-title">ADCBATTLOAD - ADC Battery Load Enable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020110</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>ADC Battery Load Enable</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="31">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">BATTLOAD
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:1</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>BATTLOAD</td>
                            <td>RW</td>
                            <td>Enable the ADC battery load resistor<br><br>
                                 DIS                  = 0x0 - Battery load is disconnected<br>
                             EN                   = 0x1 - Battery load is enabled</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="XTALCTRL" class="panel-title">XTALCTRL - XTAL Oscillator Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020120</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>XTAL Oscillator Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="23">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="2">XTALICOMPTRIM
                                <br>0x3</td>

                            <td align="center" colspan="2">XTALIBUFTRIM
                                <br>0x1</td>

                            <td align="center" colspan="1">XTALCOMPPDNB
                                <br>0x1</td>

                            <td align="center" colspan="1">XTALPDNB
                                <br>0x1</td>

                            <td align="center" colspan="1">XTALCOMPBYPASS
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALCOREDISFB
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALSWE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:9</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8:7</td>
                            <td>XTALICOMPTRIM</td>
                            <td>RW</td>
                            <td>XTAL ICOMP trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6:5</td>
                            <td>XTALIBUFTRIM</td>
                            <td>RW</td>
                            <td>XTAL IBUFF trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>XTALCOMPPDNB</td>
                            <td>RW</td>
                            <td>XTAL Oscillator Power Down Comparator.<br><br>
                                 PWRUPCOMP            = 0x1 - Power up XTAL oscillator comparator.<br>
                             PWRDNCOMP            = 0x0 - Power down XTAL oscillator comparator.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>XTALPDNB</td>
                            <td>RW</td>
                            <td>XTAL Oscillator Power Down Core.<br><br>
                                 PWRUPCORE            = 0x1 - Power up XTAL oscillator core.<br>
                             PWRDNCORE            = 0x0 - Power down XTAL oscillator core.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>XTALCOMPBYPASS</td>
                            <td>RW</td>
                            <td>XTAL Oscillator Bypass Comparator.<br><br>
                                 USECOMP              = 0x0 - Use the XTAL oscillator comparator.<br>
                             BYPCOMP              = 0x1 - Bypass the XTAL oscillator comparator.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>XTALCOREDISFB</td>
                            <td>RW</td>
                            <td>XTAL Oscillator Disable Feedback.<br><br>
                                 EN                   = 0x0 - Enable XTAL oscillator comparator.<br>
                             DIS                  = 0x1 - Disable XTAL oscillator comparator.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>XTALSWE</td>
                            <td>RW</td>
                            <td>XTAL Software Override Enable.<br><br>
                                 OVERRIDE_DIS         = 0x0 - XTAL Software Override Disable.<br>
                             OVERRIDE_EN          = 0x1 - XTAL Software Override Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="XTALGENCTRL" class="panel-title">XTALGENCTRL - XTAL Oscillator General Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020124</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>XTAL Oscillator General Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="18">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">XTALKSBIASTRIM
                                <br>0x1</td>

                            <td align="center" colspan="6">XTALBIASTRIM
                                <br>0x0</td>

                            <td align="center" colspan="2">ACWARMUP
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:14</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13:8</td>
                            <td>XTALKSBIASTRIM</td>
                            <td>RW</td>
                            <td>XTAL IBIAS Kick start trim. This trim value is used during the startup process to enable a faster lock.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:2</td>
                            <td>XTALBIASTRIM</td>
                            <td>RW</td>
                            <td>XTAL BIAS trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>ACWARMUP</td>
                            <td>RW</td>
                            <td>Auto-calibration delay control<br><br>
                                 SEC1                 = 0x0 - Warmup period of 1-2 seconds<br>
                             SEC2                 = 0x1 - Warmup period of 2-4 seconds<br>
                             SEC4                 = 0x2 - Warmup period of 4-8 seconds<br>
                             SEC8                 = 0x3 - Warmup period of 8-16 seconds</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="XTALHSTRIMS" class="panel-title">XTALHSTRIMS - XTALHS Trims</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020128</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>XTALHS Trims</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSSPARE
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSRSTRIM
                                <br>0x0</td>

                            <td align="center" colspan="7">XTALHSIBIASTRIM
                                <br>0x0</td>

                            <td align="center" colspan="4">XTALHSIBIASCOMPTRIM
                                <br>0x0</td>

                            <td align="center" colspan="2">XTALHSIBIASCOMP2TRIM
                                <br>0x0</td>

                            <td align="center" colspan="3">XTALHSDRIVERSTRENGTH
                                <br>0x0</td>

                            <td align="center" colspan="2">XTALHSDRIVETRIM
                                <br>0x0</td>

                            <td align="center" colspan="4">XTALHSCAPTRIM
                                <br>0x0</td>

                            <td align="center" colspan="6">XTALHSCAP2TRIM
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:30</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>XTALHSSPARE</td>
                            <td>RW</td>
                            <td>xtalhs_spare<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>XTALHSRSTRIM</td>
                            <td>RW</td>
                            <td>xtalhs_rs_trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27:21</td>
                            <td>XTALHSIBIASTRIM</td>
                            <td>RW</td>
                            <td>xtalhs_ibias_trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20:17</td>
                            <td>XTALHSIBIASCOMPTRIM</td>
                            <td>RW</td>
                            <td>xtalhs_ibias_comp_trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16:15</td>
                            <td>XTALHSIBIASCOMP2TRIM</td>
                            <td>RW</td>
                            <td>xtalhs_ibias_comp2_trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:12</td>
                            <td>XTALHSDRIVERSTRENGTH</td>
                            <td>RW</td>
                            <td>xtalhs_driver_strength<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:10</td>
                            <td>XTALHSDRIVETRIM</td>
                            <td>RW</td>
                            <td>xtalhs_drive_trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9:6</td>
                            <td>XTALHSCAPTRIM</td>
                            <td>RW</td>
                            <td>xtalhs_cap_trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:0</td>
                            <td>XTALHSCAP2TRIM</td>
                            <td>RW</td>
                            <td>xtalhs_cap2_trim<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="XTALHSCTRL" class="panel-title">XTALHSCTRL - XTALHS Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002012C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>XTALHS Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="23">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSEXTERNALCLOCK
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSPADOUTEN
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSSELRCOM
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSPDNPNIMPROVE
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSINJECTIONENABLE
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSIBSTENABLE
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSCOMPSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSCOMPPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">XTALHSPDNB
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:9</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>XTALHSEXTERNALCLOCK</td>
                            <td>RW</td>
                            <td>xtalhs_external_clock<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>XTALHSPADOUTEN</td>
                            <td>RW</td>
                            <td>xtalhs_padout_en<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>XTALHSSELRCOM</td>
                            <td>RW</td>
                            <td>xtalhs_sel_rcom<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>XTALHSPDNPNIMPROVE</td>
                            <td>RW</td>
                            <td>xtalhs_pdn_pn_improve<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>XTALHSINJECTIONENABLE</td>
                            <td>RW</td>
                            <td>xtalhs_injection_enable<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>XTALHSIBSTENABLE</td>
                            <td>RW</td>
                            <td>xtalhs_ibst_enable<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>XTALHSCOMPSEL</td>
                            <td>RW</td>
                            <td>xtalhs_comp_sel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>XTALHSCOMPPDNB</td>
                            <td>RW</td>
                            <td>xtalhs_comp_pdnb<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>XTALHSPDNB</td>
                            <td>RW</td>
                            <td>xtalhs_pdnb<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="MRAMPWRCTRL" class="panel-title">MRAMPWRCTRL - MRAM Power Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020180</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>MRAM Power Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="29">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">MRAMPWRCTRL
                                <br>0x0</td>

                            <td align="center" colspan="1">MRAMSLPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">MRAMLPREN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:3</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>MRAMPWRCTRL</td>
                            <td>RW</td>
                            <td>MRAM low power mode control. When set to 1, tmc_lpr and tmc_slp are driven by the value of MRAMLPREN and MRAMSLPEN of this register.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>MRAMSLPEN</td>
                            <td>RW</td>
                            <td>MRAM sleep mode enable<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>MRAMLPREN</td>
                            <td>RW</td>
                            <td>MRAM low power mode enable<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="BODISABLE" class="panel-title">BODISABLE - Brownout Disable</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400201AC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Brownout Disable</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="27">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">BODCLVREN
                                <br>0x0</td>

                            <td align="center" colspan="1">BODSREN
                                <br>0x0</td>

                            <td align="center" colspan="1">BODFREN
                                <br>0x0</td>

                            <td align="center" colspan="1">BODCREN
                                <br>0x0</td>

                            <td align="center" colspan="1">BODLRDE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:5</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>BODCLVREN</td>
                            <td>RW</td>
                            <td>Disable VDDC_LV Brown Out reset.<br><br>
                                 EN                   = 0x1 - Enable VDDC_LV Brown Out reset.<br>
                             DIS                  = 0x0 - Disable VDDC_LV Brown Out reset.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>BODSREN</td>
                            <td>RW</td>
                            <td>Disable VDDS Brown Out reset.<br><br>
                                 EN                   = 0x1 - Enable VDDS Brown Out reset.<br>
                             DIS                  = 0x0 - Disable VDDS Brown Out reset.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>BODFREN</td>
                            <td>RW</td>
                            <td>Disable VDDF Brown Out reset.<br><br>
                                 EN                   = 0x1 - Enable VDDF Brown Out reset.<br>
                             DIS                  = 0x0 - Disable VDDF Brown Out reset.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>BODCREN</td>
                            <td>RW</td>
                            <td>Disable VDDC Brown Out reset.<br><br>
                                 EN                   = 0x1 - Enable VDDC Brown Out reset.<br>
                             DIS                  = 0x0 - Disable VDDC Brown Out reset.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>BODLRDE</td>
                            <td>RW</td>
                            <td>Disable Unregulated 1.8V Brown-out reset.<br><br>
                                 EN                   = 0x0 - Enable Unregulated 1.8v brown out reset.<br>
                             DIS                  = 0x1 - Disable Unregulated 1.8v brown out reset.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="D2ASPARE" class="panel-title">D2ASPARE - Spare registers to analog module</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400201B0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Spare registers to analog module</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="27">RSVD05
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDCAOROVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDCPUOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:5</td>
                            <td>RSVD05</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>VDDCAOROVERRIDE</td>
                            <td>RW</td>
                            <td>VDDCAOR Override. Set to 1 to connect to the VDDC rail, set to 0 to connect to the VDDC_LV rail. Before setting this bit to 0, the VDDC_LV rail must first be enabled by setting SIMOBUCK0_b.VDDCLVRXCOMPEN. Do not modify this field unless directed to do so by Ambiq engineering. If modifying, a RMW operation such as MCUCTRL->D2ASPARE_b.VDDCAOROVERRIDE=1 must be used.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>VDDCPUOVERRIDE</td>
                            <td>RW</td>
                            <td>VDDCPU Override. Set to 1 to connect to the VDDC rail, set to 0 to connect to the VDDC_LV rail. Before setting this bit to 0, the VDDC_LV rail must first be enabled by setting SIMOBUCK0_b.VDDCLVRXCOMPEN. Do not modify this field unless directed to do so by Ambiq engineering. If modifying, a RMW operation such as MCUCTRL->D2ASPARE_b.VDDCPUOVERRIDE=1 must be used.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="BOOTLOADER" class="panel-title">BOOTLOADER - Bootloader and secure boot functions</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400201B8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Bootloader and secure boot functions</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="2">SECBOOTONRST
                                <br>0x0</td>

                            <td align="center" colspan="2">SECBOOT
                                <br>0x0</td>

                            <td align="center" colspan="2">SECBOOTFEATURE
                                <br>0x0</td>

                            <td align="center" colspan="22">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">SBLLOCK
                                <br>0x0</td>

                            <td align="center" colspan="1">PROTLOCK
                                <br>0x0</td>

                            <td align="center" colspan="1">SBRLOCK
                                <br>0x0</td>

                            <td align="center" colspan="1">BOOTLOADERLOW
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:30</td>
                            <td>SECBOOTONRST</td>
                            <td>RO</td>
                            <td>Indicates whether the secure boot on warm reset is enabled<br><br>
                                 DISABLED             = 0x0 - Secure boot disabled<br>
                             ENABLED              = 0x1 - Secure boot enabled<br>
                             ERROR                = 0x2 - Error in secure boot configuration</td>
                        </tr>

                        <tr>
                            <td>29:28</td>
                            <td>SECBOOT</td>
                            <td>RO</td>
                            <td>Indicates whether the secure boot on cold reset is enabled<br><br>
                                 DISABLED             = 0x0 - Secure boot disabled<br>
                             ENABLED              = 0x1 - Secure boot enabled<br>
                             ERROR                = 0x2 - Error in secure boot configuration</td>
                        </tr>

                        <tr>
                            <td>27:26</td>
                            <td>SECBOOTFEATURE</td>
                            <td>RO</td>
                            <td>Indicates whether the secure boot feature is enabled.<br><br>
                                 DISABLED             = 0x0 - Secure boot disabled<br>
                             ENABLED              = 0x1 - Secure boot enabled<br>
                             ERROR                = 0x2 - Error in secure boot configuration</td>
                        </tr>

                        <tr>
                            <td>25:4</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>SBLLOCK</td>
                            <td>RW</td>
                            <td>Secure boot loader lock. Always resets to 1, write 1 to clear. Enables system visibility to bootloader until set.<br><br>
                                 LOCK                 = 0x1 - Enable the secure boot lock<br>
                             UNLOCK               = 0x0 - Disable the secure boot lock</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>PROTLOCK</td>
                            <td>RW</td>
                            <td>This field controls access to OEM keybank and restricts further application of NVM protections via the FLASHWPROTn and FLASHRPROTn registers. On read, 0 indicates locked, 1 indicates unlocked. Write 1 to clear the field (assert the lock). Default value of the hardware is 1 (unlocked), but the default value is also affected by INFOC_SECURITY->PLONEXIT. If PLONEXIT is set, PROTLOCK is asserted by SBL and the OEM application will see the value as 0 (locked).<br><br>
                                 LOCK                 = 0x1 - On write, this value asserts the lock. On read, see above description.<br>
                             DEFAULT              = 0x0 - On write, this value (writing 0) has no effect. On read, see above description.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>SBRLOCK</td>
                            <td>RW</td>
                            <td>Secure boot ROM lock. Always resets to 1, write 1 to clear. Enables system visibility to bootloader until set.<br><br>
                                 LOCK                 = 0x1 - Enable the secure boot lock<br>
                             DEFAULT              = 0x0 - Default value.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>BOOTLOADERLOW</td>
                            <td>RW</td>
                            <td>Determines whether the bootloader code is visible at address 0x00000000 or not. Resets to 1, write 1 to clear.<br><br>
                                 ADDR0                = 0x1 - Bootloader code at 0x00000000.<br>
                             NOADDR0              = 0x0 - Bootloader code is not visible at address</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SHADOWVALID" class="panel-title">SHADOWVALID - Register to indicate whether the shadow registers have been successfully loaded from the Flash Information Space.</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400201BC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Register to indicate whether the shadow registers have been successfully loaded from the Flash Information Space.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="29">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">INFO0VALID
                                <br>0x1</td>

                            <td align="center" colspan="1">BLDSLEEP
                                <br>0x1</td>

                            <td align="center" colspan="1">VALID
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:3</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>INFO0VALID</td>
                            <td>RO</td>
                            <td>Indicates whether info0 contains valid data<br><br>
                                 VALID                = 0x1 - Flash info0 (customer) space contains valid data.<br>
                             DEFAULT              = 0x0 - Default value.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>BLDSLEEP</td>
                            <td>RO</td>
                            <td>Indicates whether the bootloader should sleep or deep sleep if no image loaded.<br><br>
                                 DEEPSLEEP            = 0x1 - Bootloader will go to deep sleep if no flash image loaded<br>
                             SLEEP                = 0x0 - Bootloader will go to normalsleep if no flash image loaded</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>VALID</td>
                            <td>RO</td>
                            <td>Indicates whether the shadow registers contain valid data from the Flash Information Space.<br><br>
                                 VALID                = 0x1 - Flash information space contains valid data.<br>
                             DEFAULT              = 0x0 - Default value.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCRATCH0" class="panel-title">SCRATCH0 - Scratch register that is not reset by any reset</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400201C0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Scratch register that is not reset by any reset</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCRATCH0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCRATCH0</td>
                            <td>RW</td>
                            <td>Scratch register 0.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SCRATCH1" class="panel-title">SCRATCH1 - Scratch register that is not reset by any reset</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400201C4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Scratch register that is not reset by any reset</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">SCRATCH1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>SCRATCH1</td>
                            <td>RW</td>
                            <td>Scratch register 1.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DBGR1" class="panel-title">DBGR1 - Read-only debug 1</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020200</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Read-only debug 1</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">ONETO8
                                <br>0x12345678</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>ONETO8</td>
                            <td>RO</td>
                            <td>Read-only register for communication validation<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DBGR2" class="panel-title">DBGR2 - Read-only debug 2</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020204</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Read-only debug 2</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">COOLCODE
                                <br>0xc001c0de</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>COOLCODE</td>
                            <td>RO</td>
                            <td>Read-only register for communication validation<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PMUENABLE" class="panel-title">PMUENABLE - Control bit to enable/disable the PMU</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020220</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Control bit to enable/disable the PMU</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="31">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">ENABLE
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:1</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>ENABLE</td>
                            <td>RW</td>
                            <td>PMU Enable Control bit. When set, the MCU's PMU will place the MCU into the lowest power consuming Deep Sleep mode upon execution of a WFI instruction (dependent on the setting of the SLEEPDEEP bit in the ARM SCR register). When cleared, regardless of the requested sleep mode, the PMU will not enter the lowest power Deep Sleep mode, instead entering the Sleep mode.<br><br>
                                 DIS                  = 0x0 - Disable MCU power management.<br>
                             EN                   = 0x1 - Enable MCU power management.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DBGCTRL" class="panel-title">DBGCTRL - Debug subsystem Control. Determines the debug components enable and clk frequency.</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020250</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Debug subsystem Control. Determines the debug components enable and clk frequency.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="14">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">DBGDSP1OCDHALTONRST
                                <br>0x0</td>

                            <td align="center" colspan="1">DBGDSP0OCDHALTONRST
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">DBGTSCLKSEL
                                <br>0x4</td>

                            <td align="center" colspan="1">DBGDSP1TRACEEN
                                <br>0x0</td>

                            <td align="center" colspan="1">DBGDSP0TRACEEN
                                <br>0x0</td>

                            <td align="center" colspan="1">DBGETMTRACEEN
                                <br>0x0</td>

                            <td align="center" colspan="1">DBGETBENABLE
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="3">CM4CLKSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">CM4TPIUENABLE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:18</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>DBGDSP1OCDHALTONRST</td>
                            <td>RW</td>
                            <td>Debug subsystem DSP1 OCD Halt on Reset<br><br>
                                 DIS                  = 0x0 - Disable DSP1 OCD Halt on Reset.<br>
                             EN                   = 0x1 - Enable DSP1 OCD Halt on Reset.</td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>DBGDSP0OCDHALTONRST</td>
                            <td>RW</td>
                            <td>Debug subsystem DSP0 OCD Halt on Reset<br><br>
                                 DIS                  = 0x0 - Disable DSP0 OCD Halt on Reset.<br>
                             EN                   = 0x1 - Enable DSP0 OCD Halt on Reset.</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:12</td>
                            <td>DBGTSCLKSEL</td>
                            <td>RW</td>
                            <td>This field selects the frequency of the ARM M4 dbg ts port.<br><br>
                                 LOWPWR               = 0x0 - Low power state.<br>
                             HFRCDIV2             = 0x1 - Selects HFRC divided by 2 as the source dbg ts clk<br>
                             HFRCDIV8             = 0x2 - Selects HFRC divided by 8 as the source dbg ts clk<br>
                             HFRCDIV16            = 0x3 - Selects HFRC divided by 16 as the source dbg ts clk<br>
                             HFRCDIV32            = 0x4 - Selects HFRC divided by 32 as the source dbg ts clk</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>DBGDSP1TRACEEN</td>
                            <td>RW</td>
                            <td>Debug subsystem DSP1 trace enable<br><br>
                                 DIS                  = 0x0 - Disable DSP1 trace.<br>
                             EN                   = 0x1 - Enable DSP1 trace.</td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>DBGDSP0TRACEEN</td>
                            <td>RW</td>
                            <td>Debug subsystem DSP0 trace enable<br><br>
                                 DIS                  = 0x0 - Disable DSP0 trace.<br>
                             EN                   = 0x1 - Enable DSP0 trace.</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>DBGETMTRACEEN</td>
                            <td>RW</td>
                            <td>Debug subsystem ETM trace enable<br><br>
                                 DIS                  = 0x0 - Disable ETM trace.<br>
                             EN                   = 0x1 - Enable ETM trace.</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>DBGETBENABLE</td>
                            <td>RW</td>
                            <td>Debug subsystem ETB enable to store the trace data.<br><br>
                                 DIS                  = 0x0 - Disable ETB.<br>
                             EN                   = 0x1 - Enable ETB.</td>
                        </tr>

                        <tr>
                            <td>7:4</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3:1</td>
                            <td>CM4CLKSEL</td>
                            <td>RW</td>
                            <td>This field selects the frequency of the ARM M4 TPIU port.<br><br>
                                 LOWPWR               = 0x0 - Low power state.<br>
                             HFRC96               = 0x1 - Selects HFRC 96Mhz as the source TPIU clk<br>
                             HFRC48               = 0x2 - Selects HFRC 48Mhz as the source TPIU clk<br>
                             HFRC24               = 0x3 - Selects HFRC 24Mhz as the source TPIU clk<br>
                             HFRC6                = 0x4 - Selects HFRC 6Mhz as the source TPIU clk<br>
                             HFRC3                = 0x5 - Selects HFRC 3Mhz as the source TPIU clk<br>
                             HFRC1P5              = 0x6 - Selects HFRC 1.5Mhz as the source TPIU clk<br>
                             HFRC2_192            = 0x7 - Selects HFRC2 192Mhz as the source TPIU clk. Note that this setting requires CLKGEN.MISC.HFRC2 be enabled.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>CM4TPIUENABLE</td>
                            <td>RW</td>
                            <td>TPIU Enable field. When set, the ARM M4 TPIU is enabled and data can be streamed out trace data from ARM ITM and ETM modules through either SWO or TRACEDATA ports<br><br>
                                 DIS                  = 0x0 - Disable the TPIU.<br>
                             EN                   = 0x1 - Enable the TPIU.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="OTAPOINTER" class="panel-title">OTAPOINTER - OTA (Over the Air) Update Pointer/Status. Reset only by POA</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020264</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>OTA (Over the Air) Update Pointer/Status. Reset only by POA</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="30">OTAPOINTER
                                <br>0x0</td>

                            <td align="center" colspan="1">OTASBLUPDATE
                                <br>0x0</td>

                            <td align="center" colspan="1">OTAVALID
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:2</td>
                            <td>OTAPOINTER</td>
                            <td>RW</td>
                            <td>Flash page pointer with updated OTA image<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>OTASBLUPDATE</td>
                            <td>RW</td>
                            <td>Indicates that the sbl_init has been updated<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>OTAVALID</td>
                            <td>RW</td>
                            <td>Indicates that an OTA update is valid<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="APBDMACTRL" class="panel-title">APBDMACTRL - DMA Control Register. Determines misc settings for DMA operation</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020280</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>DMA Control Register. Determines misc settings for DMA operation</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="8">HYSTERESIS
                                <br>0x2</td>

                            <td align="center" colspan="6">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">DECODEABORT
                                <br>0x1</td>

                            <td align="center" colspan="1">DMAENABLE
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:8</td>
                            <td>HYSTERESIS</td>
                            <td>RW</td>
                            <td>This field determines how long the DMA engine of apb/disp/gfx will remain active during deep sleep before shutting down and returning the system to full deep sleep. Values are based on a 94KHz clock and are roughly 10us increments for a range of ~10us to 2.55ms<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:2</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>DECODEABORT</td>
                            <td>RW</td>
                            <td>APB Decode Abort. When set, the APB bridge will issue a data abort (bus fault) on transactions to peripherals that are powered down. When set to 0, writes are quietly discarded and reads return 0.<br><br>
                                 DISABLE              = 0x0 - Bus operations to powered down peripherals are quietly discarded<br>
                             ENABLE               = 0x1 - Bus operations to powered down peripherals result in a bus fault.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>DMAENABLE</td>
                            <td>RW</td>
                            <td>Enable the DMA controller. When disabled, DMA requests will be ignored by the controller<br><br>
                                 DISABLE              = 0x0 - DMA operations disabled<br>
                             ENABLE               = 0x1 - DMA operations enabled</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="KEXTCLKSEL" class="panel-title">KEXTCLKSEL - Key Register to enable the use of external clock selects via the EXTCLKSEL reg</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020338</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Locks the state of the EXTCLKSEL register from writes. This is done to prevent errant writes to the register, as this could cause the chip to halt. Write a value of 0x53 to unlock write access to the EXTCLKSEL register. Once unlocked, the register will read back a 1 to undicate this is unlocked. Writing the register with any other value other than 0x53 will enable the lock.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">KEXTCLKSEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>KEXTCLKSEL</td>
                            <td>RW</td>
                            <td>Key register value.<br><br>
                                 Key                  = 0x53 - Key value to unlock the register.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK0" class="panel-title">SIMOBUCK0 - SIMOBUCK specific control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002033C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>This WRITE_ONLY register controls various buck parameters. It will read back as 0x00000000.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="27">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">TONTOFFNODEGLITCH
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDCLVRXCOMPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDSRXCOMPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDFRXCOMPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDCRXCOMPEN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:5</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>TONTOFFNODEGLITCH</td>
                            <td>RW</td>
                            <td>Enable the ton and toff signals no deglitch output.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>VDDCLVRXCOMPEN</td>
                            <td>RW</td>
                            <td>Enable the VDDC LV rail.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>VDDSRXCOMPEN</td>
                            <td>RW</td>
                            <td>Enable the VDDS rail.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>VDDFRXCOMPEN</td>
                            <td>RW</td>
                            <td>Enable the VDDS rail.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>VDDCRXCOMPEN</td>
                            <td>RW</td>
                            <td>Enable the VDDC rail.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK1" class="panel-title">SIMOBUCK1 - SIMO Buck Clock, buck sequence, observation bus Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020340</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>1. Control the even division of 3 clocks: refresh, low power and TONCLK. 2. Control gap bewteen secondary switches. 3. Debug features: control the amount of time TONCLK is on, and the time before snubber asserts for each buck sequence. 4. Enable or disable the observation bus. 5. Select the buck sequence operation mode. 6. Control delay between primary Pmos and Nmos transitions.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD30
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD29
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD28
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD26
                                <br>0x0</td>

                            <td align="center" colspan="4">TONCLKTRIM
                                <br>0x1</td>

                            <td align="center" colspan="1">RSVD21
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD20
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD18
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD16
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD11
                                <br>0x0</td>

                            <td align="center" colspan="5">RXCLKACTTRIM
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD05
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD04
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD03
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD02
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD01
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>RSVD30</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>RSVD29</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>RSVD28</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27:26</td>
                            <td>RSVD26</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25:22</td>
                            <td>TONCLKTRIM</td>
                            <td>RW</td>
                            <td>This divides the 100 MHz ton clock. Even divides are supported only. This value represents the division amount minus 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>RSVD21</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>RSVD20</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:18</td>
                            <td>RSVD18</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17:16</td>
                            <td>RSVD16</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:11</td>
                            <td>RSVD11</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10:6</td>
                            <td>RXCLKACTTRIM</td>
                            <td>RW</td>
                            <td>This divides the 5 MHz refresh clock. Even divides are supported only. This value represents the division amount minus 1.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>RSVD05</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>RSVD04</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>RSVD03</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>RSVD02</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>RSVD01</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK2" class="panel-title">SIMOBUCK2 - SIMO Buck Muxed VDDC Active Sequence Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020344</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Muxed VDDC Active Sequence Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="5">VDDCACTLOWTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD19
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD15
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDCACTHIGHTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD06
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD02
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:29</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28:24</td>
                            <td>VDDCACTLOWTONTRIM</td>
                            <td>RW</td>
                            <td>VDDC active high ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23:19</td>
                            <td>RSVD19</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18:15</td>
                            <td>RSVD15</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:11</td>
                            <td>VDDCACTHIGHTONTRIM</td>
                            <td>RW</td>
                            <td>VDDC active high ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10:6</td>
                            <td>RSVD06</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:2</td>
                            <td>RSVD02</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK3" class="panel-title">SIMOBUCK3 - SIMO Buck Muxed VDDC low power Sequence Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020348</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Muxed VDDC low power Sequence Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDCLPLOWTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD21
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD17
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDCLPHIGHTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD08
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD04
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD02
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:30</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29:26</td>
                            <td>VDDCLPLOWTONTRIM</td>
                            <td>RW</td>
                            <td>VDDC LP low ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25:21</td>
                            <td>RSVD21</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20:17</td>
                            <td>RSVD17</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16:13</td>
                            <td>VDDCLPHIGHTONTRIM</td>
                            <td>RW</td>
                            <td>VDDC LP high ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12:8</td>
                            <td>RSVD08</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:4</td>
                            <td>RSVD04</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3:2</td>
                            <td>RSVD02</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK6" class="panel-title">SIMOBUCK6 - SIMO Buck Muxed VDDF Active Sequence Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020354</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Muxed VDDF Active Sequence Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD29
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD28
                                <br>0x0</td>

                            <td align="center" colspan="6">RSVD22
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD21
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDFACTHIGHTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD12
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD08
                                <br>0x0</td>

                            <td align="center" colspan="6">RSVD02
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD29</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>RSVD28</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27:22</td>
                            <td>RSVD22</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>RSVD21</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20:17</td>
                            <td>VDDFACTHIGHTONTRIM</td>
                            <td>RW</td>
                            <td>VDDF active high ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16:12</td>
                            <td>RSVD12</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:8</td>
                            <td>RSVD08</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:2</td>
                            <td>RSVD02</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK7" class="panel-title">SIMOBUCK7 - SIMO Buck Muxed VDDF active Sequence Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020358</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Muxed VDDF active Sequence Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="6">RSVD25
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD23
                                <br>0x0</td>

                            <td align="center" colspan="5">ZXCOMPZXTRIM
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD16
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD15
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD13
                                <br>0x0</td>

                            <td align="center" colspan="5">VDDFACTLOWTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD03
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:25</td>
                            <td>RSVD25</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24:23</td>
                            <td>RSVD23</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22:18</td>
                            <td>ZXCOMPZXTRIM</td>
                            <td>RW</td>
                            <td>Zxcomp trim. Feedthrough to analog.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17:16</td>
                            <td>RSVD16</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RSVD15</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:13</td>
                            <td>RSVD13</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12:8</td>
                            <td>VDDFACTLOWTONTRIM</td>
                            <td>RW</td>
                            <td>VDDF active low ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:3</td>
                            <td>RSVD03</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK8" class="panel-title">SIMOBUCK8 - SIMO Buck Muxed VDDF Low Power Sequence Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002035C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Muxed VDDF Low Power Sequence Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="6">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDFLPLOWTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD17
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD13
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDFLPHIGHTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD04
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:26</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25:22</td>
                            <td>VDDFLPLOWTONTRIM</td>
                            <td>RW</td>
                            <td>VDDF low power low ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:17</td>
                            <td>RSVD17</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16:13</td>
                            <td>RSVD13</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12:9</td>
                            <td>VDDFLPHIGHTONTRIM</td>
                            <td>RW</td>
                            <td>VDDF low power high ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8:4</td>
                            <td>RSVD04</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK9" class="panel-title">SIMOBUCK9 - SIMO Buck Muxed VDDS Active Sequence Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020360</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Muxed VDDS Active Sequence Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="4">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD27
                                <br>0x0</td>

                            <td align="center" colspan="5">VDDSACTLOWTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD21
                                <br>0x0</td>

                            <td align="center" colspan="4">VDDSACTHIGHTONTRIM
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD12
                                <br>0x0</td>

                            <td align="center" colspan="4">RSVD08
                                <br>0x0</td>

                            <td align="center" colspan="6">RSVD02
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:28</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>RSVD27</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26:22</td>
                            <td>VDDSACTLOWTONTRIM</td>
                            <td>RW</td>
                            <td>VDDS active low ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>RSVD21</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20:17</td>
                            <td>VDDSACTHIGHTONTRIM</td>
                            <td>RW</td>
                            <td>VDDS active high ton trim control for Buck sequence.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16:12</td>
                            <td>RSVD12</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:8</td>
                            <td>RSVD08</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:2</td>
                            <td>RSVD02</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK12" class="panel-title">SIMOBUCK12 - SIMO Buck Compare, Brown out, Active, Low power Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002036C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Compare, Brown out, Active, Low power Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="6">LPTRIMVDDF
                                <br>0x0</td>

                            <td align="center" colspan="6">ACTTRIMVDDF
                                <br>0x0</td>

                            <td align="center" colspan="10">RSVD10
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD05
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:26</td>
                            <td>LPTRIMVDDF</td>
                            <td>RW</td>
                            <td>Low power VDDF trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25:20</td>
                            <td>ACTTRIMVDDF</td>
                            <td>RW</td>
                            <td>Active VDDF trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:10</td>
                            <td>RSVD10</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9:5</td>
                            <td>RSVD05</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK13" class="panel-title">SIMOBUCK13 - SIMO Buck Compare, Brown out, Active, Low power Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020370</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Compare, Brown out, Active, Low power Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="6">LPTRIMVDDS
                                <br>0x0</td>

                            <td align="center" colspan="6">ACTTRIMVDDS
                                <br>0x0</td>

                            <td align="center" colspan="10">RSVD10
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD05
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:26</td>
                            <td>LPTRIMVDDS</td>
                            <td>RW</td>
                            <td>Low power VDDS trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25:20</td>
                            <td>ACTTRIMVDDS</td>
                            <td>RW</td>
                            <td>Active VDDS trim.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:10</td>
                            <td>RSVD10</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9:5</td>
                            <td>RSVD05</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SIMOBUCK15" class="panel-title">SIMOBUCK15 - SIMO Buck Compare, Brown out, Active and Low power Trim Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020378</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SIMO Buck Compare, Brown out, Active and Low power Trim Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">TRIMLATCHOVER
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD29
                                <br>0x0</td>

                            <td align="center" colspan="5">ZXCOMPOFFSETTRIM
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD23
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD22
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD21
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD20
                                <br>0x0</td>

                            <td align="center" colspan="10">RSVD10
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD05
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>TRIMLATCHOVER</td>
                            <td>RW</td>
                            <td>Override / Bypass the simobuck trim latch to enable on-the-fly trimming for VDDF and VDDS active and LP trims<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:29</td>
                            <td>RSVD29</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28:24</td>
                            <td>ZXCOMPOFFSETTRIM</td>
                            <td>RW</td>
                            <td>Zxcomp offset trim. Feedthrough to analog.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23</td>
                            <td>RSVD23</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>RSVD22</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>RSVD21</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>RSVD20</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:10</td>
                            <td>RSVD10</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9:5</td>
                            <td>RSVD05</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PWRSW0" class="panel-title">PWRSW0 - PWRSW Control 0</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002037C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>PWRSW Control 0</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">PWRSWVDDRCPUOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRCPUSTATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRCPUPGN
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDRCPUDYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMLOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMLSTATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMLDYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMDSP1OVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMDSP1STATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMDSP1DYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMDSP0OVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMDSP0STATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMDSP0DYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMCPUOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMCPUSTATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDMCPUDYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDDSP1OVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDDSP1PGN
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDDSP1DYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDDSP0OVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDDSP0PGN
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDDSP0DYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDCAOROVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDCAORDYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDCPUOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDCPUPGN
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDCPUDYNSEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>PWRSWVDDRCPUOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddrcpu_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>PWRSWVDDRCPUSTATSEL</td>
                            <td>RW</td>
                            <td>VDDRCPU power switch static select<br><br>
                                 VDDC                 = 0x1 - Select VDDC rail<br>
                             VDDFLP               = 0x0 - Select VDDFLP rail</td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>PWRSWVDDRCPUPGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrcpu_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28:27</td>
                            <td>PWRSWVDDRCPUDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrcpu_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>PWRSWVDDMLOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddml_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>PWRSWVDDMLSTATSEL</td>
                            <td>RW</td>
                            <td>VDDML power switch static select<br><br>
                                 VDDC                 = 0x0 - Select VDDC rail<br>
                             VDDF                 = 0x1 - Select VDDF rail</td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>PWRSWVDDMLDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddml_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23</td>
                            <td>PWRSWVDDMDSP1OVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddmdsp1_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>PWRSWVDDMDSP1STATSEL</td>
                            <td>RW</td>
                            <td>VDDMDSP1 power switch static select<br><br>
                                 VDDC                 = 0x0 - Select VDDC rail<br>
                             VDDF                 = 0x1 - Select VDDF rail</td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>PWRSWVDDMDSP1DYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddmdsp1_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>PWRSWVDDMDSP0OVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddmdsp0_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>PWRSWVDDMDSP0STATSEL</td>
                            <td>RW</td>
                            <td>VDDMDSP0 power switch static select<br><br>
                                 VDDC                 = 0x0 - Select VDDC rail<br>
                             VDDF                 = 0x1 - Select VDDF rail</td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>PWRSWVDDMDSP0DYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddmdsp0_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>PWRSWVDDMCPUOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddmcpu_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>PWRSWVDDMCPUSTATSEL</td>
                            <td>RW</td>
                            <td>VDDMCPU power switch static select<br><br>
                                 VDDC                 = 0x0 - Select VDDC rail<br>
                             VDDF                 = 0x1 - Select VDDF rail</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>PWRSWVDDMCPUDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddmcpu_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>PWRSWVDDDSP1OVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vdddsp1_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>PWRSWVDDDSP1PGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vdddsp1_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12:11</td>
                            <td>PWRSWVDDDSP1DYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vdddsp1_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>PWRSWVDDDSP0OVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vdddsp0_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>PWRSWVDDDSP0PGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vdddsp0_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8:7</td>
                            <td>PWRSWVDDDSP0DYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vdddsp0_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6</td>
                            <td>PWRSWVDDCAOROVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddcaor_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:4</td>
                            <td>PWRSWVDDCAORDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddcaor_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>PWRSWVDDCPUOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddcpu_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>PWRSWVDDCPUPGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddcpu_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>PWRSWVDDCPUDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddcpu_dynsel<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PWRSW1" class="panel-title">PWRSW1 - PWRSW Control 1</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020380</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>PWRSW Control 1</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">SHORTVDDFVDDSORVAL
                                <br>0x0</td>

                            <td align="center" colspan="1">SHORTVDDFVDDSOREN
                                <br>0x0</td>

                            <td align="center" colspan="1">SHORTVDDCVDDCLVORVAL
                                <br>0x0</td>

                            <td align="center" colspan="1">SHORTVDDCVDDCLVOREN
                                <br>0x0</td>

                            <td align="center" colspan="1">FORCEVDDRMOFF
                                <br>0x0</td>

                            <td align="center" colspan="1">FORCEVDDRMVDDS
                                <br>0x0</td>

                            <td align="center" colspan="1">USEVDDF4VDDRCPUINHP
                                <br>0x0</td>

                            <td align="center" colspan="2">DIGPWRSWOVRDRVSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">DIGPWRSWOVRDRVEN
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWOVRDRVEN
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWCOMPPDNB
                                <br>0x1</td>

                            <td align="center" colspan="1">PWRSWVDDLOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDLPGN
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRMOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRMSTATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRMPGN
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRMDYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRLOVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRLSTATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRLPGN
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRLDYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRDSP1OVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRDSP1STATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRDSP1PGN
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDRDSP1DYNSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRDSP0OVERRIDE
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRDSP0STATSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PWRSWVDDRDSP0PGN
                                <br>0x0</td>

                            <td align="center" colspan="2">PWRSWVDDRDSP0DYNSEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>SHORTVDDFVDDSORVAL</td>
                            <td>RW</td>
                            <td>pwrsw short override value for vddf/vdds<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>SHORTVDDFVDDSOREN</td>
                            <td>RW</td>
                            <td>pwrsw short override select for vddf/vdds<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>SHORTVDDCVDDCLVORVAL</td>
                            <td>RW</td>
                            <td>pwrsw short override value for vddc/vddclv<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>SHORTVDDCVDDCLVOREN</td>
                            <td>RW</td>
                            <td>pwrsw short override select for vddc/vddclv<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>FORCEVDDRMOFF</td>
                            <td>RW</td>
                            <td>Setting this bit forces VDDRM to be open when Flash is off. This is valid for only normal operational mode (i.e. without overrides).<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>FORCEVDDRMVDDS</td>
                            <td>RW</td>
                            <td>Setting this bit selects VDDS for VDDRM when Flash is off. This is valid for only normal operational mode (i.e. without overrides).<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>USEVDDF4VDDRCPUINHP</td>
                            <td>RW</td>
                            <td>Setting this bit selects VDDF for VDDRCPU in when MCU is in HP mode. This is valid for only normal operational mode (i.e without overrides).<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24:23</td>
                            <td>DIGPWRSWOVRDRVSEL</td>
                            <td>RW</td>
                            <td>digpwrsw_ovrdrv_sel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>22</td>
                            <td>DIGPWRSWOVRDRVEN</td>
                            <td>RW</td>
                            <td>digpwrsw_ovrdrv_en<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>PWRSWOVRDRVEN</td>
                            <td>RW</td>
                            <td>pwrsw_ovrdrv_en<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20</td>
                            <td>PWRSWCOMPPDNB</td>
                            <td>RW</td>
                            <td>pwrsw_comp_pdnb<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19</td>
                            <td>PWRSWVDDLOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddl_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>PWRSWVDDLPGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddl_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>PWRSWVDDRMOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddrm_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>PWRSWVDDRMSTATSEL</td>
                            <td>RW</td>
                            <td>VDDRM power switch static select<br><br>
                                 VDDC                 = 0x1 - Select VDDC rail<br>
                             VDDFLP               = 0x0 - Select VDDFLP rail</td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>PWRSWVDDRMPGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrm_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>PWRSWVDDRMDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrm_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>PWRSWVDDRLOVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddrl_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>PWRSWVDDRLSTATSEL</td>
                            <td>RW</td>
                            <td>VDDRL power switch static select<br><br>
                                 VDDC                 = 0x1 - Select VDDC rail<br>
                             VDDFLP               = 0x0 - Select VDDFLP rail</td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>PWRSWVDDRLPGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrl_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>PWRSWVDDRLDYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrl_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>PWRSWVDDRDSP1OVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddrdsp1_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>PWRSWVDDRDSP1STATSEL</td>
                            <td>RW</td>
                            <td>VDDRDSP1 power switch static select<br><br>
                                 VDDC                 = 0x1 - Select VDDC rail<br>
                             VDDFLP               = 0x0 - Select VDDFLP rail</td>
                        </tr>

                        <tr>
                            <td>7</td>
                            <td>PWRSWVDDRDSP1PGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrdsp1_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>6:5</td>
                            <td>PWRSWVDDRDSP1DYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrdsp1_dynsel<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>PWRSWVDDRDSP0OVERRIDE</td>
                            <td>RW</td>
                            <td>override enable for pwrsw_vddrdsp0_dynsel and pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>PWRSWVDDRDSP0STATSEL</td>
                            <td>RW</td>
                            <td>VDDRDSP0 power switch static select<br><br>
                                 VDDC                 = 0x1 - Select VDDC rail<br>
                             VDDFLP               = 0x0 - Select VDDFLP rail</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>PWRSWVDDRDSP0PGN</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrdsp0_pgn<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>PWRSWVDDRDSP0DYNSEL</td>
                            <td>RW</td>
                            <td>override value for pwrsw_vddrdsp0_dynsel<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="USBRSTCTRL" class="panel-title">USBRSTCTRL - USB Reset Startup Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020388</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>USB Reset Startup Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="29">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">USBUTMIRSTRELEASE
                                <br>0x0</td>

                            <td align="center" colspan="1">USBPORRSTRELEASE
                                <br>0x0</td>

                            <td align="center" colspan="1">USBRSTENABLE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:3</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>USBUTMIRSTRELEASE</td>
                            <td>RW</td>
                            <td>Set this bit to '1' after USB power domain is up.  This will release the reset override condition<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>USBPORRSTRELEASE</td>
                            <td>RW</td>
                            <td>Set this bit to '1' after USB power domain is up.  This will release the reset override condition<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>USBRSTENABLE</td>
                            <td>RW</td>
                            <td>This bit enables this register control. If set to '1', the reset release bits will be active.  If set to '0', this register is not controlling the USB override bits.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHWPROT0" class="panel-title">FLASHWPROT0 - Flash Write Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203A8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits write-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FW0BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FW0BITS</td>
                            <td>RW</td>
                            <td>Write protect flash 0x00000000 - 0x0007FFFF. Each bit provides write protection for 16KB chunks of flash data space. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHWPROT1" class="panel-title">FLASHWPROT1 - Flash Write Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203AC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits write-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FW1BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FW1BITS</td>
                            <td>RW</td>
                            <td>Write protect flash 0x00080000 - 0x000FFFFF. Each bit provides write protection for 16KB chunks of flash data space. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHWPROT2" class="panel-title">FLASHWPROT2 - Flash Write Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203B0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits write-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FW2BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FW2BITS</td>
                            <td>RW</td>
                            <td>Write protect flash 0x00100000 - 0x0017FFFF. Each bit provides write protection for 16KB chunks of flash data space. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHWPROT3" class="panel-title">FLASHWPROT3 - Flash Write Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203B4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits write-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FW3BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FW3BITS</td>
                            <td>RW</td>
                            <td>Write protect flash 0x00180000 - 0x001FFFFF. Each bit provides write protection for 16KB chunks of flash data space. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHRPROT0" class="panel-title">FLASHRPROT0 - Flash Read Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203B8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits read-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FR0BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FR0BITS</td>
                            <td>RW</td>
                            <td>Copy (read) protect flash 0x00000000 - 0x0007FFFF. Each bit provides read protection for 16KB chunks of flash. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHRPROT1" class="panel-title">FLASHRPROT1 - Flash Read Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203BC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits read-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FR1BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FR1BITS</td>
                            <td>RW</td>
                            <td>Copy (read) protect flash 0x00080000 - 0x000FFFFF. Each bit provides read protection for 16KB chunks of flash. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHRPROT2" class="panel-title">FLASHRPROT2 - Flash Read Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203C0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits read-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FR2BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FR2BITS</td>
                            <td>RW</td>
                            <td>Copy (read) protect flash 0x00100000 - 0x0017FFFF. Each bit provides read protection for 16KB chunks of flash. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="FLASHRPROT3" class="panel-title">FLASHRPROT3 - Flash Read Protection Bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203C4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits read-protect flash in 16KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">FR3BITS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>FR3BITS</td>
                            <td>RW</td>
                            <td>Copy (read) protect flash 0x00180000 - 0x001FFFFF. Each bit provides read protection for 16KB chunks of flash. Bits are cleared by writing a 1 to the bit. When read, 0 indicates the region is protected. Bits are sticky (can be set when PROTLOCK is 1, but only cleared by reset)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DMASRAMWPROT0" class="panel-title">DMASRAMWPROT0 - SRAM write-protection bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203C8</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits write-protect system SRAM from DMA operations in 8KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">DMAWPROT0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>DMAWPROT0</td>
                            <td>RW</td>
                            <td>Write protect SRAM from DMA. Each bit provides write protection for an 8KB region of memory. When set to 1, the region will be protected from DMA writes, when set to 0, DMA may write the region.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DMASRAMWPROT1" class="panel-title">DMASRAMWPROT1 - SRAM write-protection bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203CC</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits write-protect system SRAM from DMA operations in 8KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="16">DMAWPROT1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>DMAWPROT1</td>
                            <td>RW</td>
                            <td>Write protect SRAM from DMA. Each bit provides write protection for an 8KB region of memory. When set to 1, the region will be protected from DMA writes, when set to 0, DMA may write the region.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DMASRAMRPROT0" class="panel-title">DMASRAMRPROT0 - SRAM read-protection bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203D0</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits read-protect system SRAM from DMA operations in 8KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="32">DMARPROT0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:0</td>
                            <td>DMARPROT0</td>
                            <td>RW</td>
                            <td>Read protect SRAM from DMA. Each bit provides write protection for an 8KB region of memory. When set to 1, the region will be protected from DMA reads, when set to 0, DMA may read the region.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="DMASRAMRPROT1" class="panel-title">DMASRAMRPROT1 - SRAM read-protection bits</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x400203D4</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>These bits read-protect system SRAM from DMA operations in 8KB chunks.</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="16">DMARPROT1
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:0</td>
                            <td>DMARPROT1</td>
                            <td>RW</td>
                            <td>Read protect SRAM from DMA. Each bit provides write protection for an 8KB region of memory. When set to 1, the region will be protected from DMA reads, when set to 0, DMA may read the region.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="USBPHYRESET" class="panel-title">USBPHYRESET - DSP0 CACHE RAM TRIM</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020418</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>DSP0 CACHE RAM TRIM</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">RESERVED18
                                <br>0x0</td>

                            <td align="center" colspan="3">RESERVED17
                                <br>0x1</td>

                            <td align="center" colspan="1">RESERVED16
                                <br>0x1</td>

                            <td align="center" colspan="2">RESERVED15
                                <br>0x1</td>

                            <td align="center" colspan="1">RESERVED14
                                <br>0x1</td>

                            <td align="center" colspan="2">RESERVED13
                                <br>0x3</td>

                            <td align="center" colspan="1">RESERVED12
                                <br>0x1</td>

                            <td align="center" colspan="3">RESERVED11
                                <br>0x7</td>

                            <td align="center" colspan="1">RESERVED10
                                <br>0x0</td>

                            <td align="center" colspan="1">RESERVED09
                                <br>0x0</td>

                            <td align="center" colspan="1">RESERVED08
                                <br>0x0</td>

                            <td align="center" colspan="3">RESERVED07
                                <br>0x1</td>

                            <td align="center" colspan="1">RESERVED06
                                <br>0x1</td>

                            <td align="center" colspan="2">RESERVED05
                                <br>0x0</td>

                            <td align="center" colspan="1">RESERVED04
                                <br>0x1</td>

                            <td align="center" colspan="2">RESERVED03
                                <br>0x3</td>

                            <td align="center" colspan="1">RESERVED02
                                <br>0x1</td>

                            <td align="center" colspan="3">RESERVED01
                                <br>0x7</td>

                            <td align="center" colspan="1">USBPHYUTMIRSTDIS
                                <br>0x0</td>

                            <td align="center" colspan="1">USBPHYPORRSTDIS
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>RESERVED18</td>
                            <td>RW</td>
                            <td>Self-timed override (test mode only)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:28</td>
                            <td>RESERVED17</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA WABLM - 00=No adjust 11=increased delay, enabled by WABL<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>RESERVED16</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA RAM WABL - Write Assist Enable (active high)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26:25</td>
                            <td>RESERVED15</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA RAWLM<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>RESERVED14</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA RAWL<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23:22</td>
                            <td>RESERVED13</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA EMAW<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21</td>
                            <td>RESERVED12</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA EMAS<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>20:18</td>
                            <td>RESERVED11</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA EMA<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>RESERVED10</td>
                            <td>RW</td>
                            <td>Override for DSP0 ICACHE DATA RET1N override enable<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>RESERVED09</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE DATA RET1N value<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15</td>
                            <td>RESERVED08</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:12</td>
                            <td>RESERVED07</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG WABLM - 00=No adjust 11=increased delay, enabled by WABL<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>RESERVED06</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG RAM WABL - Write Assist Enable (active high)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10:9</td>
                            <td>RESERVED05</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG RAWLM<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>RESERVED04</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG RAWL<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:6</td>
                            <td>RESERVED03</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG EMAW<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>RESERVED02</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG EMAS<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>4:2</td>
                            <td>RESERVED01</td>
                            <td>RW</td>
                            <td>DSP0 ICACHE TAG EMA<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>USBPHYUTMIRSTDIS</td>
                            <td>RW</td>
                            <td>De-assert USB PHY UTMI reset override<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>USBPHYPORRSTDIS</td>
                            <td>RW</td>
                            <td>De-assert USB PHY POR reset override<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUDADCPWRCTRL" class="panel-title">AUDADCPWRCTRL - Audio ADC Power Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002042C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Audio ADC Power Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="13">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCKEEPOUTEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCRFBUFSLWEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCINBUFEN
                                <br>0x0</td>

                            <td align="center" colspan="2">AUDADCINBUFSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCVBATDIVEN
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDAUDADCRESETN
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDAUDADCDIGISOLATE
                                <br>0x0</td>

                            <td align="center" colspan="1">VDDAUDADCSARISOLATE
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDREFKEEPPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDREFBUFPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDBGTPEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCBPSEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCAPSEN
                                <br>0x0</td>

                            <td align="center" colspan="1">AUDADCPWRCTRLSWE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:19</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>AUDADCKEEPOUTEN</td>
                            <td>RW</td>
                            <td>Audio ADC reference keeper out en<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>AUDADCRFBUFSLWEN</td>
                            <td>RW</td>
                            <td>Audio ADC reference buffer slew enable<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>AUDADCINBUFEN</td>
                            <td>RW</td>
                            <td>Audio ADC Input Buffer Power Enable ( if the AUDADCPWRCTRLSWE bit is set )<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:14</td>
                            <td>AUDADCINBUFSEL</td>
                            <td>RW</td>
                            <td>Audio ADC input buffer mux select<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>AUDADCVBATDIVEN</td>
                            <td>RW</td>
                            <td>Audio ADC VBAT DIV Power Enable ( if the AUDADCPWRCTRLSWE bit is set )<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>10</td>
                            <td>VDDAUDADCRESETN</td>
                            <td>RW</td>
                            <td>RESETN signal for Power Switched SAR and Digital Controller (when global power switch is off and if the AUDADCPWRCTRLSWE bit is set)<br><br>
                                 ASSERT               = 0x0 - Resetn is asserted<br>
                             DEASSERT             = 0x1 - Resetn is de-asserted</td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>VDDAUDADCDIGISOLATE</td>
                            <td>RW</td>
                            <td>ISOLATE signal for audio ADC Digital Contoller ( when AUDADCAPSEN is switched off and if the AUDADCPWRCTRLSWE bit is set)<br><br>
                                 DIS                  = 0x0 - No Isolation<br>
                             EN                   = 0x1 - Isolate</td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>VDDAUDADCSARISOLATE</td>
                            <td>RW</td>
                            <td>ISOLATE signal for Power Switched SAR ( when AUDADCBPSEN is switched off )<br><br>
                                 DIS                  = 0x0 - No Isolation<br>
                             EN                   = 0x1 - Isolate</td>
                        </tr>

                        <tr>
                            <td>7:6</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5</td>
                            <td>AUDREFKEEPPEN</td>
                            <td>RW</td>
                            <td>Reference Buffer Keeper Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Reference Buffer Keeper Power Switch disable.<br>
                             EN                   = 0x1 - Reference Buffer Keeper Power Switch enable.</td>
                        </tr>

                        <tr>
                            <td>4</td>
                            <td>AUDREFBUFPEN</td>
                            <td>RW</td>
                            <td>Reference Buffer Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Reference Buffer Power Switch disable.<br>
                             EN                   = 0x1 - Reference Buffer Power Switch enable.</td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>AUDBGTPEN</td>
                            <td>RW</td>
                            <td>Bandgap and Temperature Sensor Power Switch Enable<br><br>
                                 DIS                  = 0x0 - Bandgap and temperature sensor disable.<br>
                             EN                   = 0x1 - Bandgap and temperature sensor enable.</td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>AUDADCBPSEN</td>
                            <td>RW</td>
                            <td>Enable the Analog, IO and SAR Digital logic Power Switch on when set to 1 if the AUDADCPWRCTRLSWE bit is set.<br><br>
                                 DIS                  = 0x0 - AUDADC power switch software power disable.<br>
                             EN                   = 0x1 - AUDADC power switch software power enable.</td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>AUDADCAPSEN</td>
                            <td>RW</td>
                            <td>Enable the Global audio ADC Power Switch on when set to 1 if the AUDADCPWRCTRLSWE bit is set.<br><br>
                                 DIS                  = 0x0 - AUDADC power switch software power disable.<br>
                             EN                   = 0x1 - AUDADC power switch software power enable.</td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>AUDADCPWRCTRLSWE</td>
                            <td>RW</td>
                            <td>Audio ADC Power Control Software Override Enable<br><br>
                                 OVERRIDE_DIS         = 0x0 - Audio ADC temperature sensor and bandgap Software Override Disable.<br>
                             OVERRIDE_EN          = 0x1 - Audio ADC temperature sensor and bandgap Software Override Enable.</td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUDIO1" class="panel-title">AUDIO1 - Audio trims 1</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020430</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Audio trims 1</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="10">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="2">RSVD20
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD17
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD16
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">MICBIASPDNB
                                <br>0x0</td>

                            <td align="center" colspan="6">MICBIASVOLTAGETRIM
                                <br>0x0</td>

                            <td align="center" colspan="6">RSVD00
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:22</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:20</td>
                            <td>RSVD20</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:17</td>
                            <td>RSVD17</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16</td>
                            <td>RSVD16</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:13</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>MICBIASPDNB</td>
                            <td>RW</td>
                            <td>Power down control for the block<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:6</td>
                            <td>MICBIASVOLTAGETRIM</td>
                            <td>RW</td>
                            <td>Output voltage trim<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:0</td>
                            <td>RSVD00</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PGAADCIFCTRL" class="panel-title">PGAADCIFCTRL - PGA ADCIF control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020438</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>PGA ADCIF control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="17">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="2">PGAADCIFVCOMPSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PGAADCIFVCOMPEN
                                <br>0x0</td>

                            <td align="center" colspan="3">RSVD09
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD08
                                <br>0x0</td>

                            <td align="center" colspan="2">PGAADCIFCHBPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGAADCIFCHBACTIVE
                                <br>0x0</td>

                            <td align="center" colspan="2">PGAADCIFCHAPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGAADCIFCHAACTIVE
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:15</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14:13</td>
                            <td>PGAADCIFVCOMPSEL</td>
                            <td>RW</td>
                            <td>Select for VCOMP output (0: A0, 1: A1, 2: B0, 3: B1)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>PGAADCIFVCOMPEN</td>
                            <td>RW</td>
                            <td>Enable for VCOMP output<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:9</td>
                            <td>RSVD09</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8</td>
                            <td>RSVD08</td>
                            <td>RW</td>
                            <td>RESERVED - this field should not be modified<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:6</td>
                            <td>PGAADCIFCHBPDNB</td>
                            <td>RW</td>
                            <td>Power down for channels B0 and B1 (0 = powered down; 1 = standby)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>5:4</td>
                            <td>PGAADCIFCHBACTIVE</td>
                            <td>RW</td>
                            <td>PGAADCIF active signal for channels B0 and B1. Starts and stops 2 clocks after demultiplexed SOC signal.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3:2</td>
                            <td>PGAADCIFCHAPDNB</td>
                            <td>RW</td>
                            <td>Power down for channels A0 and A1 (0 = powered down; 1 = standby)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1:0</td>
                            <td>PGAADCIFCHAACTIVE</td>
                            <td>RW</td>
                            <td>PGAADCIF active signal for channels A0 and A1. Starts and stops 2 clocks after demultiplexed SOC signal.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PGACTRL1" class="panel-title">PGACTRL1 - PGA control 1</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x4002043C</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>PGA control 1</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">PGAGAINAOVRD
                                <br>0x0</td>

                            <td align="center" colspan="1">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">VCOMPSELPGA
                                <br>0x0</td>

                            <td align="center" colspan="1">PGAVREFGENQUICKSTARTEN
                                <br>0x0</td>

                            <td align="center" colspan="1">PGAVREFGENPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">PGAIREFGENPDNB
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHAVCMGENQCHARGEEN
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHAVCMGENPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGACHAOPAMPOUTPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGACHAOPAMPINPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGACHABYPASSEN
                                <br>0x0</td>

                            <td align="center" colspan="5">PGACHA1GAIN2SEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHA1GAIN2DIV2SEL
                                <br>0x0</td>

                            <td align="center" colspan="3">PGACHA1GAIN1SEL
                                <br>0x0</td>

                            <td align="center" colspan="5">PGACHA0GAIN2SEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHA0GAIN2DIV2SEL
                                <br>0x0</td>

                            <td align="center" colspan="3">PGACHA0GAIN1SEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>PGAGAINAOVRD</td>
                            <td>RW</td>
                            <td>Apply BYPASS and GAIN bits from this register (for channel A) instead of automatically via audio ADC.  Note that audio ADC FIFO meta data will not reflect dB gain as used when configuring audio ADC.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>29</td>
                            <td>VCOMPSELPGA</td>
                            <td>RW</td>
                            <td>Select for VCOMP output (0: A0, 1: A1, 2: B0, 3: B1)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>28</td>
                            <td>PGAVREFGENQUICKSTARTEN</td>
                            <td>RW</td>
                            <td>VREFGEN quick start enable (pulsed during startup)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>27</td>
                            <td>PGAVREFGENPDNB</td>
                            <td>RW</td>
                            <td>VREFGEN power down (0: powered down, 1: powered up)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>26</td>
                            <td>PGAIREFGENPDNB</td>
                            <td>RW</td>
                            <td>IREFGEN power down (0: powered down, 1: powered up)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>PGACHAVCMGENQCHARGEEN</td>
                            <td>RW</td>
                            <td>Channel A VCMGEN quick charge enable (pulsed during channel powerup)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>PGACHAVCMGENPDNB</td>
                            <td>RW</td>
                            <td>Channel A VCMGEN power down  (0: powered down, 1: powered up)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23:22</td>
                            <td>PGACHAOPAMPOUTPDNB</td>
                            <td>RW</td>
                            <td>Channels A0 and A1 output stage opamp power down (0: powered down, 1: powered up)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:20</td>
                            <td>PGACHAOPAMPINPDNB</td>
                            <td>RW</td>
                            <td>Channels A0 and A1 input stage opamp power down (0: powered down, 1: powered up). Must be 1 when respective PGACHABYPASSEN = 0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:18</td>
                            <td>PGACHABYPASSEN</td>
                            <td>RW</td>
                            <td>Bypass enable for Channels A0 and A1 (1: bypass, when gain LT 12 dB; 0: otherwise)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17:13</td>
                            <td>PGACHA1GAIN2SEL</td>
                            <td>RW</td>
                            <td>Channel A1 PGA gain (0: 0dB, ..., 23: 11.5dB in 0.5 dB steps)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>PGACHA1GAIN2DIV2SEL</td>
                            <td>RW</td>
                            <td>Channel A1 PGA divide by two select (0: 0 dB, 1: -6dB), needed for fully differential inputs<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:9</td>
                            <td>PGACHA1GAIN1SEL</td>
                            <td>RW</td>
                            <td>Channel A1 preamp gain (0: 12dB, ..., 7: 33dB in 3 dB steps)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8:4</td>
                            <td>PGACHA0GAIN2SEL</td>
                            <td>RW</td>
                            <td>Channel A0 PGA gain (0: 0dB, ..., 23: 11.5dB in 0.5 dB steps)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>PGACHA0GAIN2DIV2SEL</td>
                            <td>RW</td>
                            <td>Channel A0 PGA divide by two select (0: 0 dB, 1: -6dB), needed for fully differential inputs<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>PGACHA0GAIN1SEL</td>
                            <td>RW</td>
                            <td>Channel A0 preamp gain (0: 12dB, ..., 7: 33dB in 3 dB steps)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PGACTRL2" class="panel-title">PGACTRL2 - PGA control 2</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020440</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>PGA control 2</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="1">PGAGAINBOVRD
                                <br>0x0</td>

                            <td align="center" colspan="5">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHBVCMGENQCHARGEEN
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHBVCMGENPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGACHBOPAMPOUTPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGACHBOPAMPINPDNB
                                <br>0x0</td>

                            <td align="center" colspan="2">PGACHBBYPASSEN
                                <br>0x0</td>

                            <td align="center" colspan="5">PGACHB1GAIN2SEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHB1GAIN2DIV2SEL
                                <br>0x0</td>

                            <td align="center" colspan="3">PGACHB1GAIN1SEL
                                <br>0x0</td>

                            <td align="center" colspan="5">PGACHB0GAIN2SEL
                                <br>0x0</td>

                            <td align="center" colspan="1">PGACHB0GAIN2DIV2SEL
                                <br>0x0</td>

                            <td align="center" colspan="3">PGACHB0GAIN1SEL
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31</td>
                            <td>PGAGAINBOVRD</td>
                            <td>RW</td>
                            <td>Apply BYPASS and GAIN bits from this register (for channel B) instead of automatically via audio ADC.  Note that audio ADC FIFO meta data will not reflect dB gain as used when configuring audio ADC.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>30:26</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>25</td>
                            <td>PGACHBVCMGENQCHARGEEN</td>
                            <td>RW</td>
                            <td>Channel B VCMGEN quick charge enable (pulsed during channel powerup)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>24</td>
                            <td>PGACHBVCMGENPDNB</td>
                            <td>RW</td>
                            <td>Channel B VCMGEN power down  (0: powered down, 1: powered up)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>23:22</td>
                            <td>PGACHBOPAMPOUTPDNB</td>
                            <td>RW</td>
                            <td>Channels B0 and B1 output stage opamp power down (0: powered down, 1: powered up)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>21:20</td>
                            <td>PGACHBOPAMPINPDNB</td>
                            <td>RW</td>
                            <td>Channels B0 and B1 input stage opamp power down (0: powered down, 1: powered up). Must be 1 when respective PGACHBBYPASSEN = 0.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>19:18</td>
                            <td>PGACHBBYPASSEN</td>
                            <td>RW</td>
                            <td>Bypass enable for Channels B0 and B1 (1: bypass, when gain LT 12 dB; 0: otherwise)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17:13</td>
                            <td>PGACHB1GAIN2SEL</td>
                            <td>RW</td>
                            <td>Channel B1 PGA gain (0: 0dB, ..., 23: 11.5dB in 0.5 dB steps)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>12</td>
                            <td>PGACHB1GAIN2DIV2SEL</td>
                            <td>RW</td>
                            <td>Channel B1 PGA divide by two select (0: 0 dB, 1: -6dB), needed for fully differential inputs<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>11:9</td>
                            <td>PGACHB1GAIN1SEL</td>
                            <td>RW</td>
                            <td>Channel B1 preamp gain (0: 12dB, ..., 7: 33dB in 3 dB steps)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8:4</td>
                            <td>PGACHB0GAIN2SEL</td>
                            <td>RW</td>
                            <td>Channel B0 PGA gain (0: 0dB, ..., 23: 11.5dB in 0.5 dB steps)<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>PGACHB0GAIN2DIV2SEL</td>
                            <td>RW</td>
                            <td>Channel B0 PGA divide by two select (0: 0 dB, 1: -6dB), needed for fully differential inputs<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2:0</td>
                            <td>PGACHB0GAIN1SEL</td>
                            <td>RW</td>
                            <td>Channel B0 preamp gain (0: 12dB, ..., 7: 33dB in 3 dB steps)<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="AUDADCPWRDLY" class="panel-title">AUDADCPWRDLY - Audio ADC Power Up Delay Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020444</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>Audio ADC Power Up Delay Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="16">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="8">AUDADCPWR1
                                <br>0x2</td>

                            <td align="center" colspan="8">AUDADCPWR0
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:16</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>15:8</td>
                            <td>AUDADCPWR1</td>
                            <td>RW</td>
                            <td>ADC Reference Keeper enable delay in 16 ADC CLK increments for ADC_CLKSEL = 0x1, 8 ADC CLOCK increments for ADC_CLKSEL = 0x2.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>7:0</td>
                            <td>AUDADCPWR0</td>
                            <td>RW</td>
                            <td>ADC Reference Buffer Power Enable delay in 64 ADC CLK increments for ADC_CLKSEL = 0x1, 32 ADC CLOCK increments for ADC_CLKSEL = 0x2.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="SDIOCTRL" class="panel-title">SDIOCTRL - SDIO/eMMC Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020450</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>SDIO/eMMC Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="13">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">SDIODATOPENDRAINEN
                                <br>0x0</td>

                            <td align="center" colspan="1">SDIOCMDOPENDRAINEN
                                <br>0x0</td>

                            <td align="center" colspan="2">SDIOXINCLKSEL
                                <br>0x0</td>

                            <td align="center" colspan="1">SDIOASYNCWKUPENA
                                <br>0x0</td>

                            <td align="center" colspan="4">SDIOOTAPDLYSEL
                                <br>0x4</td>

                            <td align="center" colspan="1">SDIOOTAPDLYENA
                                <br>0x0</td>

                            <td align="center" colspan="5">SDIOITAPDLYSEL
                                <br>0x8</td>

                            <td align="center" colspan="1">SDIOITAPDLYENA
                                <br>0x0</td>

                            <td align="center" colspan="1">SDIOITAPCHGWIN
                                <br>0x0</td>

                            <td align="center" colspan="1">SDIOXINCLKEN
                                <br>0x0</td>

                            <td align="center" colspan="1">SDIOSYSCLKEN
                                <br>0x0</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:19</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>18</td>
                            <td>SDIODATOPENDRAINEN</td>
                            <td>RW</td>
                            <td>SDIO DAT line configured as open-drian. 0: Push-pull mode, 1: Open-drain mode<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>17</td>
                            <td>SDIOCMDOPENDRAINEN</td>
                            <td>RW</td>
                            <td>SDIO CMD line configured as open-drian. 0: Push-pull mode, 1: Open-drain mode<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>16:15</td>
                            <td>SDIOXINCLKSEL</td>
                            <td>RW</td>
                            <td>Select clock source for SDIO xin_clk.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>14</td>
                            <td>SDIOASYNCWKUPENA</td>
                            <td>RW</td>
                            <td>SDIO asynchronous wakeup mode. 0: Synchronous wakeup mode, 1: Asynchronous wakeup mode<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>13:10</td>
                            <td>SDIOOTAPDLYSEL</td>
                            <td>RW</td>
                            <td>Selects one of the 16 Taps on the sdcard_clk. This is effective only when otapdlyena is asserted.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>9</td>
                            <td>SDIOOTAPDLYENA</td>
                            <td>RW</td>
                            <td>Used to enable the selective Tap delay on the sdcard_clk so as to generate the delayed sdcard_clk. This is used to latch the CMD/DAT outputs to generate delay on them w.r.t CLK going out. This signal along with otapdlysel[3:0] selects the amount of delay to be inserted on the Clock line. This signal should not be asserted when operating in DS mode.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>8:4</td>
                            <td>SDIOITAPDLYSEL</td>
                            <td>RW</td>
                            <td>Selects one of the 32 Taps on the rxclk_in line. This is effective only when itapdlyena is asserted and Tuning is not enabled.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>3</td>
                            <td>SDIOITAPDLYENA</td>
                            <td>RW</td>
                            <td>Used to enable selective Tap delay line on the Looped back SD Clock (rxclk_in). This signal along with the itapdlysel[4:0] selects the the amount of delay to be inserted on the line. When Tuning is enabled (for SDR104 and optionally for SDR50), this signal is ignored and internalcontrols are used instead. This should not be asserted when operating in DS mode.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>2</td>
                            <td>SDIOITAPCHGWIN</td>
                            <td>RW</td>
                            <td>This is used to gate the output of the Tap Delay lines so as to avoid glithches being propagated into the Core. This signal should be asserted few clocks before the itapdlysel changes and should be asserted for few clocks after.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>1</td>
                            <td>SDIOXINCLKEN</td>
                            <td>RW</td>
                            <td>SDIO serial clock source enable.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>SDIOSYSCLKEN</td>
                            <td>RW</td>
                            <td>SDIO system clock enable.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

        <div class="panel panel-default">
            <div class="panel-heading">
                <h3 id="PDMCTRL" class="panel-title">PDMCTRL - PDM Control</h3>
            </div>
            <div class="panel-body">
                <h3>Address:</h3>
                <table style="margin:10px">
                    <tr id="row_0_0_">
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">Instance 0 Address:</span>
                        </td>
                        <td class="entry">
                            <span style="width:32px;display:inline-block;">&#160;</span>
                            <span class="h5">0x40020454</span>
                        </td>
                    </tr>

                </table>
                <h3>Description:</h3>
                <p>PDM Control</p>
                <h3>Register Fields:</h3>
                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>31</th>
                            <th>30</th>
                            <th>29</th>
                            <th>28</th>
                            <th>27</th>
                            <th>26</th>
                            <th>25</th>
                            <th>24</th>
                            <th>23</th>
                            <th>22</th>
                            <th>21</th>
                            <th>20</th>
                            <th>19</th>
                            <th>18</th>
                            <th>17</th>
                            <th>16</th>
                            <th>15</th>
                            <th>14</th>
                            <th>13</th>
                            <th>12</th>
                            <th>11</th>
                            <th>10</th>
                            <th>9</th>
                            <th>8</th>
                            <th>7</th>
                            <th>6</th>
                            <th>5</th>
                            <th>4</th>
                            <th>3</th>
                            <th>2</th>
                            <th>1</th>
                            <th>0</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td align="center" colspan="31">RSVD
                                <br>0x0</td>

                            <td align="center" colspan="1">PDMGLOBALEN
                                <br>0x1</td>

                        </tr>
                    </tbody>
                </table>
                <br>

                <table style="margin:10px" class="table table-bordered table-condensed">
                    <thead>
                        <tr>
                            <th>Bits</th>
                            <th>Name</th>
                            <th>RW</th>
                            <th>Description</th>
                        </tr>
                    </thead>
                    <tbody>
                        <tr>
                            <td>31:1</td>
                            <td>RSVD</td>
                            <td>RO</td>
                            <td>RESERVED.<br><br>
                                </td>
                        </tr>

                        <tr>
                            <td>0</td>
                            <td>PDMGLOBALEN</td>
                            <td>RW</td>
                            <td>PDM global enable to allow all PDMs to have synchronized interface clocks and FIFO sampling.<br><br>
                                </td>
                        </tr>

                    </tbody>
                </table>
                <br>
            </div>
        </div>

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